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Contents

README

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SN74AUP1G98DRYR

Texas Instruments · Logic Gates · XSON-6(1x1.5)

SN74AUP1G98DRYR from Texas Instruments, in a XSON-6(1x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B input Logic input B with Schmitt-trigger input, 3.6-V tolerant; unused inputs must be held at VCC or GND.
2 GND power_in Ground.
3 A input Logic input A with Schmitt-trigger input, 3.6-V tolerant; unused inputs must be held at VCC or GND.
4 Y output Gate output, determined by the 3-bit input pattern of C, B, A per the function table; supports Ioff partial-power-down mode.
5 VCC power_in Supply voltage, 0.8 V to 3.6 V recommended operating range.
6 C input Logic input C with Schmitt-trigger input, 3.6-V tolerant; unused inputs must be held at VCC or GND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package XSON-6(1x1.5)
Category Logic
Pins 6

CAD (KiCad official)

  • Symbol: SN74AUP1G98DRYR
  • Footprint: Package_SON:Texas_USON-6_1x1.45mm_P0.5mm_SMD
  • 3D model: XSON-6(1x1.5) (KiCad packages3D, STEP)
  • 3D model files: sn74aup1g98dryr-etched.step / sn74aup1g98dryr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74aup1g98dryr.step / sn74aup1g98dryr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 593c782072179706, retrieved 2026-10-03, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF