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Ray Publish 0.1.0 8017c31 17d ago

SN74AUP1G80DCKR

Texas Instruments · Flip Flops · SC-70-5

SN74AUP1G80DCKR from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D input Data input; data is transferred to the Q output on the positive-going clock edge when the setup time requirement is met.
2 CLK input Positive-edge-triggered clock input; clock triggering occurs at a voltage level and is not directly related to the clock pulse rise time.
3 GND power_in Ground pin.
4 Q output Inverted output per the pin function table; the device description refers to the Q output, so the polarity should be confirmed against the functional table.
5 VCC power_in Positive supply; recommended operating VCC range is 0.8 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SC-70-5
Category Logic
Pins 5

CAD (KiCad official)

  • Symbol: SN74AUP1G80DCKR
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SC-70-5 (KiCad packages3D, STEP)
  • 3D model files: sn74aup1g80dckr-etched.step / sn74aup1g80dckr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74aup1g80dckr.step / sn74aup1g80dckr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (48 pp, sha256 12ee6c4cebce675a, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF