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Contents

README

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SN74AUP1G80DBVR

Texas Instruments · Flip Flops · SOT-23-5

SN74AUP1G80DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D input Data input; data at this input is transferred to Q output on the positive-going edge of the clock pulse when the setup-time requirement is met.
2 CLK input Positive-edge-triggered clock input; causes data at input D to be transferred to Q output on the rising edge of the clock pulse.
3 GND power_in Ground pin; 0 V reference for the power supply.
4 Q output Inverted output (Q-bar); outputs the complement of the data input latched on the clock rising edge.
5 VCC power_in Positive supply voltage; operating range 0.8 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Logic
Pins 5

CAD (KiCad official)

  • Symbol: SN74AUP1G80DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: sn74aup1g80dbvr-etched.step / sn74aup1g80dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74aup1g80dbvr.step / sn74aup1g80dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (48 pp, sha256 12ee6c4cebce675a, retrieved 2026-09-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF