component
SN74AUP1G08DRYR
Public Made by Adomby adom
Texas Instruments Gates, XSON-6(1x1.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74AUP1G08DRYR
Texas Instruments · Gates · XSON-6(1x1.5)
SN74AUP1G08DRYR from Texas Instruments, in a XSON-6(1x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Input A of the 2-input positive-AND gate; unused inputs must be held at VCC or GND. |
| 2 | B | input | Input B of the 2-input positive-AND gate; unused inputs must be held at VCC or GND. |
| 3 | GND | power_in | Ground pin. |
| 4 | Y | output | Output Y of the AND gate (Y = A·B), with a recommended IOH/IOL of up to ±4 mA at VCC = 3 V. |
| 5 | N.C. | unconnected | No internal connection. |
| 6 | VCC | power_in | Power supply pin, recommended operating range 0.8 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | XSON-6(1x1.5) |
| Category | Logic ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 4.6 | V | 5 | ||
| Input voltage | VI | -0.5 | 4.6 | V | 5 | ||
| Output voltage, high-impedance or power-off state | VO | -0.5 | 4.6 | V | high-impedance or power-off state | 5 | |
| Input clamp current | IIK | -50 | mA | VI < 0 | 5 | ||
| Output clamp current | IOK | -50 | mA | VO < 0 | 5 | ||
| Continuous output current | IO | -20 | 20 | mA | ±20 | 5 | |
| Continuous current through VCC or GND | -50 | 50 | mA | ±50 | 5 | ||
| Maximum junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| ESD human body model | V(ESD) | 2000 | V | HBM per ANSI/ESDA/JEDEC JS-001 | 5 | ||
| ESD charged device model | V(ESD) | 1000 | V | CDM per JESD22-C101 | 5 | ||
| Supply voltage | VCC | 0.8 | 3.6 | V | 5 | ||
| High-level input voltage | VIH | 0.65 | V | VCC = 1.1 V to 1.95 V; 0.65 × VCC (coefficient shown) | 5 | ||
| High-level input voltage | VIH | 1.6 | V | VCC = 2.3 V to 2.7 V | 5 | ||
| High-level input voltage | VIH | 2 | V | VCC = 3 V to 3.6 V | 5 | ||
| Low-level input voltage | VIL | 0 | 0 | V | VCC = 0.8 V | 6 | |
| Low-level input voltage | VIL | 0.35 | V | VCC = 1.1 V to 1.95 V; 0.35 × VCC (coefficient shown) | 6 | ||
| Low-level input voltage | VIL | 0.7 | V | VCC = 2.3 V to 2.7 V | 6 | ||
| Low-level input voltage | VIL | 0.9 | V | VCC = 3 V to 3.6 V | 6 | ||
| Input voltage | VI | 0 | 3.6 | V | 6 | ||
| Output voltage | VO | 0 | V | max is VCC | 6 | ||
| Input transition rise or fall rate | Δt/Δv | 200 | ns/V | VCC = 0.8 V to 3.6 V | 6 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | 6 | ||
| Junction-to-ambient thermal resistance | RθJA | 554.9 | °C/W | DRY (SON) 6 pins | 6 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 385.4 | °C/W | DRY (SON) 6 pins | 6 | ||
| Junction-to-board thermal resistance | RθJB | 388.2 | °C/W | DRY (SON) 6 pins | 6 | ||
| Junction-to-top characterization parameter | ψJT | 159 | °C/W | DRY (SON) 6 pins | 6 | ||
| Junction-to-board characterization parameter | ψJB | 384.1 | °C/W | DRY (SON) 6 pins | 6 | ||
| High-level output voltage | VOH | 1.03 | V | IOH = -1.7 mA, VCC = 1.4 V, TA = -40°C to +85°C | 7 | ||
| High-level output voltage | VOH | 1.3 | V | IOH = -1.9 mA, VCC = 1.65 V, TA = -40°C to +85°C | 7 | ||
| High-level output voltage | VOH | 1.97 | V | IOH = -2.3 mA, VCC = 2.3 V, TA = -40°C to +85°C | 7 | ||
| High-level output voltage | VOH | 1.85 | V | IOH = -3.1 mA, VCC = 2.3 V, TA = -40°C to +85°C | 7 | ||
| High-level output voltage | VOH | 2.67 | V | IOH = -2.7 mA, VCC = 3 V, TA = -40°C to +85°C | 7 | ||
| High-level output voltage | VOH | 2.55 | V | IOH = -4 mA, VCC = 3 V, TA = -40°C to +85°C | 7 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 20 µA, VCC = 0.8 V to 3.6 V, TA = -40°C to +85°C | 7 | ||
| Low-level output voltage | VOL | 0.37 | V | IOL = 1.7 mA, VCC = 1.4 V, TA = -40°C to +85°C | 7 | ||
| Low-level output voltage | VOL | 0.35 | V | IOL = 1.9 mA, VCC = 1.65 V, TA = -40°C to +85°C | 7 | ||
| Low-level output voltage | VOL | 0.33 | V | IOL = 2.3 mA, VCC = 2.3 V, TA = -40°C to +85°C | 7 | ||
| Low-level output voltage | VOL | 0.45 | V | IOL = 3.1 mA, VCC = 2.3 V, TA = -40°C to +85°C | 7 | ||
| Input current, A or B input | II | 0.1 | 0.5 | µA | VI = GND to 3.6 V, VCC = 0 V to 3.6 V; typ at TA = 25°C, max at -40°C to +85°C | 7 | |
| Input/output power-off leakage current | Ioff | 0.2 | 0.6 | µA | VI or VO = 0 V to 3.6 V, VCC = 0 V; typ at TA = 25°C, max at -40°C to +85°C | 7 | |
| Power-off leakage current delta | ΔIoff | 0.2 | 0.6 | µA | VI or VO = 0 V to 3.6 V, VCC = 0 V to 0.2 V; typ at TA = 25°C, max at -40°C to +85°C | 7 | |
| Supply current | ICC | 0.5 | 0.9 | µA | VI = GND or (VCC to 3.6 V), IO = 0, VCC = 0.8 V to 3.6 V; typ at TA = 25°C, max at -40°C to +85°C | 7 | |
| Additional supply current | ΔICC | 40 | 50 | µA | VI = VCC, 0.6 V, IO = 0, VCC = 3.3 V; typ at TA = 25°C, max at -40°C to +85°C | 7 | |
| Input capacitance | Ci | 1.5 | pF | VI = VCC or GND, VCC = 0 V and 3.6 V | 7 | ||
| Output capacitance | Co | 3 | pF | VO = GND, VCC = 0 V | 7 | ||
| Propagation delay A or B to Y | tpd | 0.5 | 4.3 | ns | CL = 5 pF, VCC = 3.3 V ± 0.3 V, TA = -40°C to +85°C | 7 | |
| Propagation delay A or B to Y | tpd | 0.5 | 5.9 | ns | CL = 15 pF, VCC = 3.3 V ± 0.3 V, TA = -40°C to +85°C | 8 | |
| Propagation delay A or B to Y | tpd | 24 | ns | CL = 15 pF, VCC = 0.8 V, TA = 25°C | 8 |
CAD (KiCad official)
- Symbol:
SN74AUP1G08DRYR - Footprint:
Package_SON:Texas_USON-6_1x1.45mm_P0.5mm_SMD - 3D model: XSON-6(1x1.5) (KiCad packages3D, STEP)
- 3D model files:
sn74aup1g08dryr-etched.step/sn74aup1g08dryr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74aup1g08dryr.step/sn74aup1g08dryr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (47 pp, sha256
58cbe32e11199194, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).