← Commit history

Initial commit: component/sn74as573adw

Ray ·8f3a985b1d ·2d ago
2 files changed +326
README.mdadded+56
@@ -0,0 +1,56 @@+# SN74AS573ADW++**Texas Instruments** · Latches · SOIC-20++SN74AS573ADW from Texas Instruments, in a SOIC-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OE | input | Buffered output-enable input: when low the eight outputs take their normal logic states, and when high the outputs go to the high-impedance state without affecting the latches. |+| 2 | 1D | input | Data input to latch channel 1; while LE is high the output 1Q follows this input, and it is latched when LE goes low. |+| 3 | 2D | input | Data input to latch channel 2; while LE is high the output 2Q follows this input, and it is latched when LE goes low. |+| 4 | 3D | input | Data input to latch channel 3; while LE is high the output 3Q follows this input, and it is latched when LE goes low. |+| 5 | 4D | input | Data input to latch channel 4; while LE is high the output 4Q follows this input, and it is latched when LE goes low. |+| 6 | 5D | input | Data input to latch channel 5; while LE is high the output 5Q follows this input, and it is latched when LE goes low. |+| 7 | 6D | input | Data input to latch channel 6; while LE is high the output 6Q follows this input, and it is latched when LE goes low. |+| 8 | 7D | input | Data input to latch channel 7; while LE is high the output 7Q follows this input, and it is latched when LE goes low. |+| 9 | 8D | input | Data input to latch channel 8; while LE is high the output 8Q follows this input, and it is latched when LE goes low. |+| 10 | GND | power_in | Ground reference for the device. |+| 11 | LE | input | Latch-enable input: while high the latches are transparent to D, and when low the outputs are latched; data must meet the setup and hold times around the falling edge of LE. |+| 12 | 8Q | tri_state | Latch 8 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version. |+| 13 | 7Q | tri_state | Latch 7 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version. |+| 14 | 6Q | tri_state | Latch 6 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version. |+| 15 | 5Q | tri_state | Latch 5 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version. |+| 16 | 4Q | tri_state | Latch 4 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version. |+| 17 | 3Q | tri_state | Latch 3 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version. |+| 18 | 2Q | tri_state | Latch 2 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version. |+| 19 | 1Q | tri_state | Latch 1 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version. |+| 20 | VCC | power_in | Supply voltage; recommended range 4.5 V to 5.5 V (nominal 5 V) for the SN74AS573A. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-20 |+| Category | Logic |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `SN74AS573ADW`+- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`+- 3D model: SOIC-20 (KiCad packages3D, STEP)+- 3D model files: `sn74as573adw-etched.step` / `sn74as573adw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74as573adw.step` / `sn74as573adw.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74als573c) (24 pp, sha256 `54ce4b4f857c15f9`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74as573adw-datasheet.pdf)
page.jsonadded+270
@@ -0,0 +1,270 @@+{+  "slug": "sn74as573adw",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Latches, SOIC-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "sn74as573adw",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn74as573adw.kicad_sym",+    "sn74as573adw.kicad_mod",+    "sn74as573adw.glb",+    "sn74as573adw.step",+    "sn74as573adw.lbr",+    "docs/hero.png",+    "docs/sn74as573adw-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "sn74as573adw-hero.glb",+    "sn74as573adw-hero.overlay.json"+  ],+  "component": {+    "mpn": "SN74AS573ADW",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-20",+    "pin_count": 20,+    "category": "Logic",+    "subcategory": "Latches",+    "datasheet": "https://www.ti.com/cn/lit/gpn/sn74als573c",+    "parts": {+      "symbol": "sn74as573adw.kicad_sym",+      "footprint": "sn74as573adw.kicad_mod",+      "model_3d": "sn74as573adw-hero.glb",+      "model_3d_plain": "sn74as573adw.glb",+      "model_3d_step": "sn74as573adw-etched.step",+      "model_3d_step_plain": "sn74as573adw.step",+      "lbr": "sn74as573adw.lbr"+    },+    "distributor_links": {+      "lcsc": "C1547932",+      "digikey": "2156-SN74AS573ADW-ND",+      "mouser": "595-SN74AS573ADW"+    },+    "distributor_check": {+      "checked_at": "2026-10-07T22:03:48Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "2156-SN74AS573ADW-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-SN74AS573ADW",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "OE",+        "type": "input",+        "description": "Buffered output-enable input: when low the eight outputs take their normal logic states, and when high the outputs go to the high-impedance state without affecting the latches."+      },+      {+        "number": "2",+        "name": "1D",+        "type": "input",+        "description": "Data input to latch channel 1; while LE is high the output 1Q follows this input, and it is latched when LE goes low."+      },+      {+        "number": "3",+        "name": "2D",+        "type": "input",+        "description": "Data input to latch channel 2; while LE is high the output 2Q follows this input, and it is latched when LE goes low."+      },+      {+        "number": "4",+        "name": "3D",+        "type": "input",+        "description": "Data input to latch channel 3; while LE is high the output 3Q follows this input, and it is latched when LE goes low."+      },+      {+        "number": "5",+        "name": "4D",+        "type": "input",+        "description": "Data input to latch channel 4; while LE is high the output 4Q follows this input, and it is latched when LE goes low."+      },+      {+        "number": "6",+        "name": "5D",+        "type": "input",+        "description": "Data input to latch channel 5; while LE is high the output 5Q follows this input, and it is latched when LE goes low."+      },+      {+        "number": "7",+        "name": "6D",+        "type": "input",+        "description": "Data input to latch channel 6; while LE is high the output 6Q follows this input, and it is latched when LE goes low."+      },+      {+        "number": "8",+        "name": "7D",+        "type": "input",+        "description": "Data input to latch channel 7; while LE is high the output 7Q follows this input, and it is latched when LE goes low."+      },+      {+        "number": "9",+        "name": "8D",+        "type": "input",+        "description": "Data input to latch channel 8; while LE is high the output 8Q follows this input, and it is latched when LE goes low."+      },+      {+        "number": "10",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference for the device."+      },+      {+        "number": "11",+        "name": "LE",+        "type": "input",+        "description": "Latch-enable input: while high the latches are transparent to D, and when low the outputs are latched; data must meet the setup and hold times around the falling edge of LE."+      },+      {+        "number": "12",+        "name": "8Q",+        "type": "tri_state",+        "description": "Latch 8 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version."+      },+      {+        "number": "13",+        "name": "7Q",+        "type": "tri_state",+        "description": "Latch 7 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version."+      },+      {+        "number": "14",+        "name": "6Q",+        "type": "tri_state",+        "description": "Latch 6 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version."+      },+      {+        "number": "15",+        "name": "5Q",+        "type": "tri_state",+        "description": "Latch 5 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version."+      },+      {+        "number": "16",+        "name": "4Q",+        "type": "tri_state",+        "description": "Latch 4 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version."+      },+      {+        "number": "17",+        "name": "3Q",+        "type": "tri_state",+        "description": "Latch 3 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version."+      },+      {+        "number": "18",+        "name": "2Q",+        "type": "tri_state",+        "description": "Latch 2 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version."+      },+      {+        "number": "19",+        "name": "1Q",+        "type": "tri_state",+        "description": "Latch 1 3-state buffer output that drives bus lines directly, is high-impedance when OE is high, and is rated at IOL 48 mA and IOH −15 mA (recommended) for the AS version."+      },+      {+        "number": "20",+        "name": "VCC",+        "type": "power_in",+        "description": "Supply voltage; recommended range 4.5 V to 5.5 V (nominal 5 V) for the SN74AS573A."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 24,+        "cost_usd": 0.0973,+        "at": "2026-10-07T22:03:25"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/sn74als573c",+        "pages": 24,+        "sha256": "54ce4b4f857c15f9",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 20,+        "described": 20,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "sn74as573adw.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          10.3,+          12.8,+          2.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "59a10b341e6972b31d81802a048060326da627d8b92dcf4263064f4f62ec808e",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "sn74as573adw-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          10.3,+          12.8,+          2.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "37bffd4e4f00d2382398a3542208b83bfdc6e3a2edd490bf27fa06fd3547fe82",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file