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SN74AS32DR

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Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74AS32DR

Texas Instruments · Logic Gates · SOIC-14

SN74AS32DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input A of gate 1; the gate implements Y = A + B in positive logic, with VIH at least 2 V and VIL at most 0.8 V for the SN74AS32.
2 1B input Input B of gate 1; the gate implements Y = A + B in positive logic, with VIH at least 2 V and VIL at most 0.8 V for the SN74AS32.
3 1Y output Output of gate 1 (Y = A + B); the SN74AS32 is rated for IOH of -2 mA and IOL of 20 mA.
4 2A input Input A of gate 2; the gate implements Y = A + B in positive logic, with VIH at least 2 V and VIL at most 0.8 V for the SN74AS32.
5 2B input Input B of gate 2; the gate implements Y = A + B in positive logic, with VIH at least 2 V and VIL at most 0.8 V for the SN74AS32.
6 2Y output Output of gate 2 (Y = A + B); the SN74AS32 is rated for IOH of -2 mA and IOL of 20 mA.
7 GND power_in Ground reference for the device.
8 3Y output Output of gate 3 (Y = A + B); the SN74AS32 is rated for IOH of -2 mA and IOL of 20 mA.
9 3A input Input A of gate 3; the gate implements Y = A + B in positive logic, with VIH at least 2 V and VIL at most 0.8 V for the SN74AS32.
10 3B input Input B of gate 3; the gate implements Y = A + B in positive logic, with VIH at least 2 V and VIL at most 0.8 V for the SN74AS32.
11 4Y output Output of gate 4 (Y = A + B); the SN74AS32 is rated for IOH of -2 mA and IOL of 20 mA.
12 4A input Input A of gate 4; the gate implements Y = A + B in positive logic, with VIH at least 2 V and VIL at most 0.8 V for the SN74AS32.
13 4B input Input B of gate 4; the gate implements Y = A + B in positive logic, with VIH at least 2 V and VIL at most 0.8 V for the SN74AS32.
14 VCC power_in Supply voltage, 4.5 V minimum, 5 V nominal, 5.5 V maximum for the SN74AS32.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74AS32DR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74as32dr-etched.step / sn74as32dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74as32dr.step / sn74as32dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (22 pp, sha256 1fd10afd40ad5296, retrieved 2026-10-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF