component
SN74AS30DR
Public Made by Adomby adom
Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74AS30DR
Texas Instruments · Logic Gates · SOIC-14
SN74AS30DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | NAND gate input A, with VIH min 2 V, VIL max 0.8 V and input voltage range of -0.5 V to 7 V. |
| 2 | B | input | NAND gate input B, with VIH min 2 V, VIL max 0.8 V and input voltage range of -0.5 V to 7 V. |
| 3 | C | input | NAND gate input C, with VIH min 2 V, VIL max 0.8 V and input voltage range of -0.5 V to 7 V. |
| 4 | D | input | NAND gate input D, with VIH min 2 V, VIL max 0.8 V and input voltage range of -0.5 V to 7 V. |
| 5 | E | input | NAND gate input E, with VIH min 2 V, VIL max 0.8 V and input voltage range of -0.5 V to 7 V. |
| 6 | F | input | NAND gate input F, with VIH min 2 V, VIL max 0.8 V and input voltage range of -0.5 V to 7 V. |
| 7 | GND | power_in | Ground reference for the device. |
| 8 | Y | output | NAND gate output, low only when all inputs A-H are high, rated for IOH of -2 mA and IOL of 20 mA for the 'AS30. |
| 9 | N.C. | unconnected | No internal connection. |
| 10 | N.C. | unconnected | No internal connection. |
| 11 | G | input | NAND gate input G, with VIH min 2 V, VIL max 0.8 V and input voltage range of -0.5 V to 7 V. |
| 12 | H | input | NAND gate input H, with VIH min 2 V, VIL max 0.8 V and input voltage range of -0.5 V to 7 V. |
| 13 | N.C. | unconnected | No internal connection. |
| 14 | VCC | power_in | Supply voltage, recommended 4.5 V to 5.5 V (nominal 5 V), absolute maximum 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74AS30DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74as30dr-etched.step/sn74as30dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74as30dr.step/sn74as30dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
3d6478e4f4ae66a6, retrieved 2026-10-08, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).