component
SN74AS04DR
Public Made by Adomby adom
Texas Instruments Logic ICs, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 13d ago |
| viewers | 13d ago |
| package.json | 13d ago |
| page.json | 13d ago |
| README.md | 13d ago |
| sn74as04dr-etched.glb | 13d ago |
| sn74as04dr-etched.step | 13d ago |
| sn74as04dr-hero.glb | 13d ago |
| sn74as04dr-hero.overlay.json | 13d ago |
| sn74as04dr.glb | 13d ago |
| sn74as04dr.kicad_mod | 13d ago |
| sn74as04dr.kicad_sym | 13d ago |
| sn74as04dr.lbr | 13d ago |
| sn74as04dr.step | 13d ago |
SN74AS04DR
Texas Instruments · Logic ICs · SOIC-14
SN74AS04DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Input of inverter 1 (Y = A); for the SN74AS04 VIH is 2 V minimum and VIL is 0.8 V maximum, with IIH of 20 µA at 2.7 V. |
| 2 | 1Y | output | Output of inverter 1; for the SN74AS04 IOH is limited to −2 mA and IOL to 20 mA over 0 °C to 70 °C. |
| 3 | 2A | input | Input of inverter 2 (Y = A); for the SN74AS04 VIH is 2 V minimum and VIL is 0.8 V maximum, with IIH of 20 µA at 2.7 V. |
| 4 | 2Y | output | Output of inverter 2; for the SN74AS04 IOH is limited to −2 mA and IOL to 20 mA over 0 °C to 70 °C. |
| 5 | 3A | input | Input of inverter 3 (Y = A); for the SN74AS04 VIH is 2 V minimum and VIL is 0.8 V maximum, with IIH of 20 µA at 2.7 V. |
| 6 | 3Y | output | Output of inverter 3; for the SN74AS04 IOH is limited to −2 mA and IOL to 20 mA over 0 °C to 70 °C. |
| 7 | GND | power_in | Ground reference for all six inverters. |
| 8 | 4Y | output | Output of inverter 4; for the SN74AS04 IOH is limited to −2 mA and IOL to 20 mA over 0 °C to 70 °C. |
| 9 | 4A | input | Input of inverter 4 (Y = A); for the SN74AS04 VIH is 2 V minimum and VIL is 0.8 V maximum, with IIH of 20 µA at 2.7 V. |
| 10 | 5Y | output | Output of inverter 5; for the SN74AS04 IOH is limited to −2 mA and IOL to 20 mA over 0 °C to 70 °C. |
| 11 | 5A | input | Input of inverter 5 (Y = A); for the SN74AS04 VIH is 2 V minimum and VIL is 0.8 V maximum, with IIH of 20 µA at 2.7 V. |
| 12 | 6Y | output | Output of inverter 6; for the SN74AS04 IOH is limited to −2 mA and IOL to 20 mA over 0 °C to 70 °C. |
| 13 | 6A | input | Input of inverter 6 (Y = A); for the SN74AS04 VIH is 2 V minimum and VIL is 0.8 V maximum, with IIH of 20 µA at 2.7 V. |
| 14 | VCC | power_in | Supply voltage; the datasheet recommends 4.5 V to 5.5 V (5 V nominal) and gives an absolute maximum of 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4.5 | 5 | 5.5 | V | 3 | |
| High-level input voltage | VIH | 2 | V | 3 | |||
| Low-level input voltage | VIL | 0.8 | V | 3 | |||
| High-level output current | IOH | -2 | mA | 3 | |||
| Low-level output current | IOL | 20 | mA | 3 | |||
| Operating free-air temperature | TA | 0 | 70 | °C | SN74AS04 | 3 | |
| Input clamp voltage | VIK | -1.2 | V | VCC = 4.5 V, II = −18 mA | 3 | ||
| Low-level output voltage | VOL | 0.35 | 0.5 | V | VCC = 4.5 V, IOL = 20 mA | 3 | |
| Input current at maximum input voltage | II | 0.1 | mA | VCC = 5.5 V, VI = 7 V | 3 | ||
| High-level input current | IIH | 20 | µA | VCC = 5.5 V, VI = 2.7 V | 3 | ||
| Low-level input current | IIL | -0.5 | mA | VCC = 5.5 V, VI = 0.4 V | 3 | ||
| Short-circuit output current | IO | -30 | -112 | mA | VCC = 5.5 V, VO = 2.25 V | 3 | |
| Supply current, outputs high | ICCH | 3 | 4.8 | mA | VCC = 5.5 V, VI = 0 | 3 | |
| Supply current, outputs low | ICCL | 14 | 26.3 | mA | VCC = 5.5 V, VI = 4.5 V | 3 | |
| Propagation delay time, low-to-high-level output | tPLH | 1 | 5 | ns | VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX | 4 | |
| Propagation delay time, high-to-low-level output | tPHL | 1 | 4 | ns | VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX | 4 | |
| Supply voltage | VCC | 7 | V | 3 | |||
| Input voltage | VI | 7 | V | 3 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| Operating free-air temperature range | TA | 0 | 70 | °C | SN74AS04 | 3 |
CAD (KiCad official)
- Symbol:
SN74AS04DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74as04dr-etched.step/sn74as04dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74as04dr.step/sn74as04dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
07a4a6a3194e7a58, retrieved 2026-10-17, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).