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SN74ALVCH373DWR
Public Made by Adomby adom
Texas Instruments Latches, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74ALVCH373DWR
Texas Instruments · Latches · SOIC-20-300mil
SN74ALVCH373DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Output Enable input (active low); when high, forces all outputs to high-impedance state. |
| 2 | 1Q | tri_state | Latch 1 Q output (three-state). |
| 3 | 1D | input | Latch 1 data input with bus-hold. |
| 4 | 2D | input | Latch 2 data input with bus-hold. |
| 5 | 2Q | tri_state | Latch 2 Q output (three-state). |
| 6 | 3Q | tri_state | Latch 3 Q output (three-state). |
| 7 | 3D | input | Latch 3 data input with bus-hold. |
| 8 | 4D | input | Latch 4 data input with bus-hold. |
| 9 | 4Q | tri_state | Latch 4 Q output (three-state). |
| 10 | GND | power_in | Ground power return. |
| 11 | LE | input | Latch Enable input (active high); transparent when high, latches when low. |
| 12 | 5Q | tri_state | Latch 5 Q output (three-state). |
| 13 | 5D | input | Latch 5 data input with bus-hold. |
| 14 | 6D | input | Latch 6 data input with bus-hold. |
| 15 | 6Q | tri_state | Latch 6 Q output (three-state). |
| 16 | 7Q | tri_state | Latch 7 Q output (three-state). |
| 17 | 7D | input | Latch 7 data input with bus-hold. |
| 18 | 8D | input | Latch 8 data input with bus-hold. |
| 19 | 8Q | tri_state | Latch 8 Q output (three-state). |
| 20 | VCC | power_in | Supply voltage (1.65 V to 3.6 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74ALVCH373DWR - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
sn74alvch373dwr-etched.step/sn74alvch373dwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74alvch373dwr.step/sn74alvch373dwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (19 pp, sha256
2c1acfeac33a71b1, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74ALVCH373DWR
**Texas Instruments** · Latches · SOIC-20-300mil
SN74ALVCH373DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Output Enable input (active low); when high, forces all outputs to high-impedance state. |
| 2 | 1Q | tri_state | Latch 1 Q output (three-state). |
| 3 | 1D | input | Latch 1 data input with bus-hold. |
| 4 | 2D | input | Latch 2 data input with bus-hold. |
| 5 | 2Q | tri_state | Latch 2 Q output (three-state). |
| 6 | 3Q | tri_state | Latch 3 Q output (three-state). |
| 7 | 3D | input | Latch 3 data input with bus-hold. |
| 8 | 4D | input | Latch 4 data input with bus-hold. |
| 9 | 4Q | tri_state | Latch 4 Q output (three-state). |
| 10 | GND | power_in | Ground power return. |
| 11 | LE | input | Latch Enable input (active high); transparent when high, latches when low. |
| 12 | 5Q | tri_state | Latch 5 Q output (three-state). |
| 13 | 5D | input | Latch 5 data input with bus-hold. |
| 14 | 6D | input | Latch 6 data input with bus-hold. |
| 15 | 6Q | tri_state | Latch 6 Q output (three-state). |
| 16 | 7Q | tri_state | Latch 7 Q output (three-state). |
| 17 | 7D | input | Latch 7 data input with bus-hold. |
| 18 | 8D | input | Latch 8 data input with bus-hold. |
| 19 | 8Q | tri_state | Latch 8 Q output (three-state). |
| 20 | VCC | power_in | Supply voltage (1.65 V to 3.6 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `SN74ALVCH373DWR`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `sn74alvch373dwr-etched.step` / `sn74alvch373dwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74alvch373dwr.step` / `sn74alvch373dwr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74alvch373) (19 pp, sha256 `2c1acfeac33a71b1`, retrieved 2026-10-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74alvch373dwr-datasheet.pdf)