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SN74ALVCH16344DL

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Texas Instruments Buffers, Drivers, Receivers, Transceivers, SSOP-56. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74ALVCH16344DL

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SSOP-56

SN74ALVCH16344DL from Texas Instruments, in a SSOP-56. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Output enable for bank 1 (1B1-1B4), active low; high puts the outputs in the high-impedance state.
2 1B1 tri_state Bank 1 3-state output 1, follows 1A when OE1 is low.
3 1B2 tri_state Bank 1 3-state output 2, follows 1A when OE1 is low.
4 GND power_in Ground; continuous current through each GND is limited to ±100 mA.
5 1B3 tri_state Bank 1 3-state output 3, follows 1A when OE1 is low.
6 1B4 tri_state Bank 1 3-state output 4, follows 1A when OE1 is low.
7 VCC power_in Supply voltage, 1.65 V to 3.6 V recommended; continuous current through each VCC is limited to ±100 mA.
8 1A input Data input for bank 1 with bus hold, drives 1B1-1B4.
9 2B1 tri_state Bank 2 3-state output 1, follows 2A when OE2 is low.
10 2B2 tri_state Bank 2 3-state output 2, follows 2A when OE2 is low.
11 GND power_in Ground; continuous current through each GND is limited to ±100 mA.
12 2B3 tri_state Bank 2 3-state output 3, follows 2A when OE2 is low.
13 2B4 tri_state Bank 2 3-state output 4, follows 2A when OE2 is low.
14 2A input Data input for bank 2 with bus hold, drives 2B1-2B4.
15 3A input Data input for bank 3 with bus hold, drives 3B1-3B4.
16 3B1 tri_state Bank 3 3-state output 1, follows 3A when OE3 is low.
17 3B2 tri_state Bank 3 3-state output 2, follows 3A when OE3 is low.
18 GND power_in Ground; continuous current through each GND is limited to ±100 mA.
19 3B3 tri_state Bank 3 3-state output 3, follows 3A when OE3 is low.
20 3B4 tri_state Bank 3 3-state output 4, follows 3A when OE3 is low.
21 4A input Data input for bank 4 with bus hold, drives 4B1-4B4.
22 VCC power_in Supply voltage, 1.65 V to 3.6 V recommended; continuous current through each VCC is limited to ±100 mA.
23 4B1 tri_state Bank 4 3-state output 1, follows 4A when OE4 is low.
24 4B2 tri_state Bank 4 3-state output 2, follows 4A when OE4 is low.
25 GND power_in Ground; continuous current through each GND is limited to ±100 mA.
26 4B3 tri_state Bank 4 3-state output 3, follows 4A when OE4 is low.
27 4B4 tri_state Bank 4 3-state output 4, follows 4A when OE4 is low.
28 OE2 input Output enable for bank 2 (2B1-2B4), active low; high puts the outputs in the high-impedance state.
29 OE3 input Output enable for bank 3 (3B1-3B4), active low; high puts the outputs in the high-impedance state.
30 5B4 tri_state Bank 5 3-state output 4, follows 5A when OE3 is low.
31 5B3 tri_state Bank 5 3-state output 3, follows 5A when OE3 is low.
32 GND power_in Ground; continuous current through each GND is limited to ±100 mA.
33 5B2 tri_state Bank 5 3-state output 2, follows 5A when OE3 is low.
34 5B1 tri_state Bank 5 3-state output 1, follows 5A when OE3 is low.
35 VCC power_in Supply voltage, 1.65 V to 3.6 V recommended; continuous current through each VCC is limited to ±100 mA.
36 5A input Data input for bank 5 with bus hold, drives 5B1-5B4.
37 6B4 tri_state Bank 6 3-state output 4, follows 6A when OE3 is low.
38 6B3 tri_state Bank 6 3-state output 3, follows 6A when OE3 is low.
39 GND power_in Ground; continuous current through each GND is limited to ±100 mA.
40 6B2 tri_state Bank 6 3-state output 2, follows 6A when OE3 is low.
41 6B1 tri_state Bank 6 3-state output 1, follows 6A when OE3 is low.
42 6A input Data input for bank 6 with bus hold, drives 6B1-6B4.
43 7A input Data input for bank 7 with bus hold, drives 7B1-7B4.
44 7B4 tri_state Bank 7 3-state output 4, follows 7A when OE4 is low.
45 7B3 tri_state Bank 7 3-state output 3, follows 7A when OE4 is low.
46 GND power_in Ground; continuous current through each GND is limited to ±100 mA.
47 7B2 tri_state Bank 7 3-state output 2, follows 7A when OE4 is low.
48 7B1 tri_state Bank 7 3-state output 1, follows 7A when OE4 is low.
49 8A input Data input for bank 8 with bus hold, drives 8B1-8B4.
50 VCC power_in Supply voltage, 1.65 V to 3.6 V recommended; continuous current through each VCC is limited to ±100 mA.
51 8B4 tri_state Bank 8 3-state output 4, follows 8A when OE4 is low.
52 8B3 tri_state Bank 8 3-state output 3, follows 8A when OE4 is low.
53 GND power_in Ground; continuous current through each GND is limited to ±100 mA.
54 8B2 tri_state Bank 8 3-state output 2, follows 8A when OE4 is low.
55 8B1 tri_state Bank 8 3-state output 1, follows 8A when OE4 is low.
56 OE4 input Output enable for bank 4 (4B1-4B4), active low; high puts the outputs in the high-impedance state.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SSOP-56
Category Logic
Pins 56

CAD (KiCad official)

  • Symbol: SN74ALVCH16344DL
  • Footprint: Package_SO:SSOP-56_7.5x18.5mm_P0.635mm
  • 3D model: SSOP-56 (KiCad packages3D, STEP)
  • 3D model files: sn74alvch16344dl-etched.step / sn74alvch16344dl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74alvch16344dl.step / sn74alvch16344dl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (15 pp, sha256 63ddbd2a5bbdfe3b, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF