component
SN74ALS645A-1NSR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74ALS645A-1NSR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOP-20-208mil
SN74ALS645A-1NSR from Texas Instruments, in a SOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DIR | input | Direction-control input: high transmits A data to the B bus, low transmits B data to the A bus (when OE is low). |
| 2 | A1 | bidirectional | A-bus I/O port 1 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 3 | A2 | bidirectional | A-bus I/O port 2 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 4 | A3 | bidirectional | A-bus I/O port 3 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 5 | A4 | bidirectional | A-bus I/O port 4 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 6 | A5 | bidirectional | A-bus I/O port 5 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 7 | A6 | bidirectional | A-bus I/O port 6 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 8 | A7 | bidirectional | A-bus I/O port 7 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 9 | A8 | bidirectional | A-bus I/O port 8 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 10 | GND | power_in | Ground reference. |
| 11 | B8 | bidirectional | B-bus I/O port 8 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 12 | B7 | bidirectional | B-bus I/O port 7 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 13 | B6 | bidirectional | B-bus I/O port 6 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 14 | B5 | bidirectional | B-bus I/O port 5 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 15 | B4 | bidirectional | B-bus I/O port 4 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 16 | B3 | bidirectional | B-bus I/O port 3 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 17 | B2 | bidirectional | B-bus I/O port 2 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 18 | B1 | bidirectional | B-bus I/O port 1 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 19 | OE | input | Active-low output-enable input; a high level disables the outputs and isolates the A and B buses. |
| 20 | VCC | power_in | Supply voltage, recommended 4.5 V to 5.5 V (absolute maximum 7 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOP-20-208mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74ALS645A-1NSR - Footprint:
Package_SO:SOP-20_7.5x12.8mm_P1.27mm - 3D model: SOP-20-208mil, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 2.65 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
sn74als645a-1nsr-etched.step/sn74als645a-1nsr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74als645a-1nsr.step/sn74als645a-1nsr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (20 pp, sha256
e5bfc2517772955d, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74ALS645A-1NSR
**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SOP-20-208mil
SN74ALS645A-1NSR from Texas Instruments, in a SOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DIR | input | Direction-control input: high transmits A data to the B bus, low transmits B data to the A bus (when OE is low). |
| 2 | A1 | bidirectional | A-bus I/O port 1 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 3 | A2 | bidirectional | A-bus I/O port 2 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 4 | A3 | bidirectional | A-bus I/O port 3 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 5 | A4 | bidirectional | A-bus I/O port 4 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 6 | A5 | bidirectional | A-bus I/O port 5 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 7 | A6 | bidirectional | A-bus I/O port 6 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 8 | A7 | bidirectional | A-bus I/O port 7 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 9 | A8 | bidirectional | A-bus I/O port 8 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 10 | GND | power_in | Ground reference. |
| 11 | B8 | bidirectional | B-bus I/O port 8 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 12 | B7 | bidirectional | B-bus I/O port 7 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 13 | B6 | bidirectional | B-bus I/O port 6 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 14 | B5 | bidirectional | B-bus I/O port 5 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 15 | B4 | bidirectional | B-bus I/O port 4 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 16 | B3 | bidirectional | B-bus I/O port 3 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 17 | B2 | bidirectional | B-bus I/O port 2 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 18 | B1 | bidirectional | B-bus I/O port 1 with 3-state output; I/O ports tolerate up to 5.5 V. |
| 19 | OE | input | Active-low output-enable input; a high level disables the outputs and isolates the A and B buses. |
| 20 | VCC | power_in | Supply voltage, recommended 4.5 V to 5.5 V (absolute maximum 7 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOP-20-208mil |
| Category | Logic |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `SN74ALS645A-1NSR`
- Footprint: `Package_SO:SOP-20_7.5x12.8mm_P1.27mm`
- 3D model: SOP-20-208mil, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 2.65 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `sn74als645a-1nsr-etched.step` / `sn74als645a-1nsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74als645a-1nsr.step` / `sn74als645a-1nsr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74as645) (20 pp, sha256 `e5bfc2517772955d`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74als645a-1nsr-datasheet.pdf)