# SN74ALS244C-1DWR

**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil

SN74ALS244C-1DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output enable for buffer 1 (1A1-1A4 to 1Y1-1Y4); when high, outputs 1Y1-1Y4 go to the high-impedance (Z) state. |
| 2 | 1A1 | input | Data input to buffer 1, channel 1 (non-inverting path to 1Y1 when 1OE is low). |
| 3 | 2Y4 | output | Non-inverting 3-state output of buffer 2, channel 4; follows 2A4 when 2OE is low and is high-impedance when 2OE is high. |
| 4 | 1A2 | input | Data input to buffer 1, channel 2 (non-inverting path to 1Y2 when 1OE is low). |
| 5 | 2Y3 | output | Non-inverting 3-state output of buffer 2, channel 3; follows 2A3 when 2OE is low and is high-impedance when 2OE is high. |
| 6 | 1A3 | input | Data input to buffer 1, channel 3 (non-inverting path to 1Y3 when 1OE is low). |
| 7 | 2Y2 | output | Non-inverting 3-state output of buffer 2, channel 2; follows 2A2 when 2OE is low and is high-impedance when 2OE is high. |
| 8 | 1A4 | input | Data input to buffer 1, channel 4 (non-inverting path to 1Y4 when 1OE is low). |
| 9 | 2Y1 | output | Non-inverting 3-state output of buffer 2, channel 1; follows 2A1 when 2OE is low and is high-impedance when 2OE is high. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | 2A1 | input | Data input to buffer 2, channel 1 (non-inverting path to 2Y1 when 2OE is low). |
| 12 | 1Y4 | output | Non-inverting 3-state output of buffer 1, channel 4; follows 1A4 when 1OE is low and is high-impedance when 1OE is high. |
| 13 | 2A2 | input | Data input to buffer 2, channel 2 (non-inverting path to 2Y2 when 2OE is low). |
| 14 | 1Y3 | output | Non-inverting 3-state output of buffer 1, channel 3; follows 1A3 when 1OE is low and is high-impedance when 1OE is high. |
| 15 | 2A3 | input | Data input to buffer 2, channel 3 (non-inverting path to 2Y3 when 2OE is low). |
| 16 | 1Y2 | output | Non-inverting 3-state output of buffer 1, channel 2; follows 1A2 when 1OE is low and is high-impedance when 1OE is high. |
| 17 | 2A4 | input | Data input to buffer 2, channel 4 (non-inverting path to 2Y4 when 2OE is low). |
| 18 | 1Y1 | output | Non-inverting 3-state output of buffer 1, channel 1; follows 1A1 when 1OE is low and is high-impedance when 1OE is high. |
| 19 | 2OE | input | Active-low output enable for buffer 2 (2A1-2A4 to 2Y1-2Y4); when high, outputs 2Y1-2Y4 go to the high-impedance (Z) state. |
| 20 | VCC | power_in | Supply voltage pin; recommended operating range is 4.5 V to 5.5 V (5 V nominal) for the SN74ALS244C. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |

## CAD (KiCad official)

- Symbol: `SN74ALS244C-1DWR`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `sn74als244c-1dwr-etched.step` / `sn74als244c-1dwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74als244c-1dwr.step` / `sn74als244c-1dwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74als244c) (25 pp, sha256 `f1ae4aa346571940`, retrieved 2026-10-12, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74als244c-1dwr-datasheet.pdf)