component
SN74AHCT574PWR
Public Made by Adomby adom
Texas Instruments Logic ICs, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 13d ago |
| viewers | 13d ago |
| package.json | 13d ago |
| page.json | 13d ago |
| README.md | 13d ago |
| sn74ahct574pwr-etched.glb | 13d ago |
| sn74ahct574pwr-etched.step | 13d ago |
| sn74ahct574pwr-hero.glb | 13d ago |
| sn74ahct574pwr-hero.overlay.json | 13d ago |
| sn74ahct574pwr.glb | 13d ago |
| sn74ahct574pwr.kicad_mod | 13d ago |
| sn74ahct574pwr.kicad_sym | 13d ago |
| sn74ahct574pwr.lbr | 13d ago |
| sn74ahct574pwr.step | 13d ago |
SN74AHCT574PWR
Texas Instruments · Logic ICs · TSSOP-20
SN74AHCT574PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Output Enable input for the 3-state outputs; the excerpt gives no polarity or logic-level detail for this pin. |
| 2 | 1D | input | Data input 1D for the first latch/flip-flop channel. |
| 3 | 2D | input | Data input 2D for the second channel. |
| 4 | 3D | input | Data input 3D for the third channel. |
| 5 | 4D | input | Data input 4D for the fourth channel. |
| 6 | 5D | input | Data input 5D for the fifth channel. |
| 7 | 6D | input | Data input 6D for the sixth channel. |
| 8 | 7D | input | Data input 7D for the seventh channel. |
| 9 | 8D | input | Data input 8D for the eighth channel. |
| 10 | GND | power_in | Ground pin for the device. |
| 11 | CLK | input | Clock input that latches the D inputs into the flip-flops. |
| 12 | 8Q | output | Output 8Q of the eighth channel. |
| 13 | 7Q | output | Output 7Q of the seventh channel. |
| 14 | 6Q | output | Output 6Q of the sixth channel. |
| 15 | 5Q | output | Output 5Q of the fifth channel. |
| 16 | 4Q | output | Output 4Q of the fourth channel. |
| 17 | 3Q | output | Output 3Q of the third channel. |
| 18 | 2Q | output | Output 2Q of the second channel. |
| 19 | 1Q | output | Output 1Q of the first channel. |
| 20 | VCC | power_in | Power supply pin; the recommended supply range is 4.5 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 | 7 | V | 4 | ||
| Input voltage range | VI | -0.5 | 7 | V | 4 | ||
| Output voltage range | VO | -0.5 | V | Printed as VCC + 0.5 V | 4 | ||
| Input clamp current | IIK | -20 | mA | VI < 0 | 4 | ||
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC | 4 | |
| Continuous output current | IO | -25 | 25 | mA | VO = 0 to VCC | 4 | |
| Continuous current through VCC or GND | -50 | 50 | mA | 4 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VCC | 4.5 | 5.5 | V | SN74AHCT574 | 4 | |
| High-level input voltage | VIH | 2 | V | 4 | |||
| Low-level input voltage | VIL | 0.8 | V | 4 | |||
| Input voltage | VI | 0 | 5.5 | V | 4 | ||
| Output voltage | VO | 0 | V | Printed as VCC | 4 | ||
| High-level output current | IOH | -8 | mA | 4 | |||
| Low-level output current | IOL | 8 | mA | 4 | |||
| Input transition rise or fall rate | Δt/Δv | 20 | ns/V | 4 | |||
| Operating free-air temperature | TA | -40 | 125 | °C | SN74AHCT574 | 4 | |
| High-level output voltage | VOH | 4.4 | V | IOH = −50 µA; VCC = 4.5 V; TA = −40 °C to 125 °C | 5 | ||
| High-level output voltage | VOH | 3.8 | V | IOH = −8 mA; VCC = 4.5 V; TA = −40 °C to 125 °C | 5 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 50 µA; VCC = 4.5 V; TA = −40 °C to 125 °C | 5 | ||
| Low-level output voltage | VOL | 0.44 | V | IOL = 8 mA; VCC = 4.5 V; TA = −40 °C to 125 °C | 5 | ||
| Input leakage current | II | -1 | 1 | µA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V | 5 | |
| Off-state (high-impedance) output current | IOZ | -2.5 | 2.5 | µA | VO = VCC or GND; VCC = 5.5 V | 5 | |
| Quiescent supply current | ICC | 40 | µA | VI = VCC or GND, IO = 0; VCC = 5.5 V | 5 | ||
| Increase in supply current per TTL input | ΔICC | 1.5 | mA | One input at 3.4 V, other inputs at VCC or GND; VCC = 5.5 V | 5 | ||
| Input capacitance | Ci | 10 | pF | VI = VCC or GND; VCC = 5 V | 5 | ||
| Pulse duration, LE high | tw | 5.5 | ns | VCC = 5 V ± 0.5 V | 5 | ||
| Setup time, data before LE↓ | tsu | 3.5 | ns | VCC = 5 V ± 0.5 V | 5 | ||
| Hold time, data after LE↓ | th | 1.5 | ns | VCC = 5 V ± 0.5 V | 5 | ||
| Maximum clock frequency | fmax | 110 | ns | CL = 15 pF; VCC = 5 V ± 0.5 V | 6 | ||
| Maximum clock frequency | fmax | 75 | ns | CL = 50 pF; VCC = 5 V ± 0.5 V | 6 | ||
| Propagation delay CLK to Q | tPLH | 1 | 11 | ns | CL = 15 pF; VCC = 5 V ± 0.5 V | 6 | |
| Enable time OE to Q | tPZH | 1 | 11.5 | ns | CL = 15 pF; VCC = 5 V ± 0.5 V | 6 | |
| Disable time OE to Q | tPHZ | 1 | 11.5 | ns | CL = 15 pF; VCC = 5 V ± 0.5 V | 6 | |
| Propagation delay CLK to Q | tPLH | 1 | 13 | ns | CL = 50 pF; VCC = 5 V ± 0.5 V | 6 | |
| Enable time OE to Q | tPZH | 1 | 13.5 | ns | CL = 50 pF; VCC = 5 V ± 0.5 V | 6 | |
| Disable time OE to Q | tPHZ | 1 | 13 | ns | CL = 50 pF; VCC = 5 V ± 0.5 V | 6 | |
| Output skew | tsk(o) | 1 | ns | CL = 50 pF | 6 | ||
| Junction-to-ambient thermal resistance (PW, TSSOP-20) | RθJA | 116.8 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance (PW, TSSOP-20) | RθJC(top) | 58.5 | °C/W | 5 | |||
| Junction-to-board thermal resistance (PW, TSSOP-20) | RθJB | 78.7 | °C/W | 5 | |||
| Junction-to-top characterization parameter (PW, TSSOP-20) | ψJT | 12.6 | °C/W | 5 | |||
| Junction-to-board characterization parameter (PW, TSSOP-20) | ψJB | 77.9 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
SN74AHCT574PWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
sn74ahct574pwr-etched.step/sn74ahct574pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ahct574pwr.step/sn74ahct574pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (41 pp, sha256
1dfd05c8ffda4541, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).