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SN74AHCT573DWR
Public Made by Adomby adom
Texas Instruments Latches, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74AHCT573DWR
Texas Instruments · Latches · SOIC-20-300mil
SN74AHCT573DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE | input | Output Enable input that activates normal operation when low or high-impedance state when high. |
| 2 | 1D | input | Data input for latch channel 1, captured when LE transitions from high to low. |
| 3 | 2D | input | Data input for latch channel 2, captured when LE transitions from high to low. |
| 4 | 3D | input | Data input for latch channel 3, captured when LE transitions from high to low. |
| 5 | 4D | input | Data input for latch channel 4, captured when LE transitions from high to low. |
| 6 | 5D | input | Data input for latch channel 5, captured when LE transitions from high to low. |
| 7 | 6D | input | Data input for latch channel 6, captured when LE transitions from high to low. |
| 8 | 7D | input | Data input for latch channel 7, captured when LE transitions from high to low. |
| 9 | 8D | input | Data input for latch channel 8, captured when LE transitions from high to low. |
| 10 | GND | power_in | Ground reference. |
| 11 | LE | input | Latch Enable input that allows transparent operation when high and latching when low. |
| 12 | 8Q | tri_state | Output for latch channel 8 that follows 8D when LE is high and OE is low, and enters high-impedance when OE is high. |
| 13 | 7Q | tri_state | Output for latch channel 7 that follows 7D when LE is high and OE is low, and enters high-impedance when OE is high. |
| 14 | 6Q | tri_state | Output for latch channel 6 that follows 6D when LE is high and OE is low, and enters high-impedance when OE is high. |
| 15 | 5Q | tri_state | Output for latch channel 5 that follows 5D when LE is high and OE is low, and enters high-impedance when OE is high. |
| 16 | 4Q | tri_state | Output for latch channel 4 that follows 4D when LE is high and OE is low, and enters high-impedance when OE is high. |
| 17 | 3Q | tri_state | Output for latch channel 3 that follows 3D when LE is high and OE is low, and enters high-impedance when OE is high. |
| 18 | 2Q | tri_state | Output for latch channel 2 that follows 2D when LE is high and OE is low, and enters high-impedance when OE is high. |
| 19 | 1Q | tri_state | Output for latch channel 1 that follows 1D when LE is high and OE is low, and enters high-impedance when OE is high. |
| 20 | VCC | power_in | Power supply pin operating from 4.5V to 5.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74AHCT573DWR - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
sn74ahct573dwr-etched.step/sn74ahct573dwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ahct573dwr.step/sn74ahct573dwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (39 pp, sha256
c68c137108b31d76, retrieved 2026-09-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).