# SN74AHCT540DWR

**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil

SN74AHCT540DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Active-low Output Enable 1 input (0-5.5V logic); high level forces all Y outputs to high-impedance state |
| 2 | A1 | input | A1 input for buffer/driver channel 1; TTL-compatible (VIL ≤ 0.8V, VIH ≥ 2V) at VCC = 4.5-5.5V |
| 3 | A2 | input | A2 input for buffer/driver channel 2; TTL-compatible (VIL ≤ 0.8V, VIH ≥ 2V) at VCC = 4.5-5.5V |
| 4 | A3 | input | A3 input for buffer/driver channel 3; TTL-compatible (VIL ≤ 0.8V, VIH ≥ 2V) at VCC = 4.5-5.5V |
| 5 | A4 | input | A4 input for buffer/driver channel 4; TTL-compatible (VIL ≤ 0.8V, VIH ≥ 2V) at VCC = 4.5-5.5V |
| 6 | A5 | input | A5 input for buffer/driver channel 5; TTL-compatible (VIL ≤ 0.8V, VIH ≥ 2V) at VCC = 4.5-5.5V |
| 7 | A6 | input | A6 input for buffer/driver channel 6; TTL-compatible (VIL ≤ 0.8V, VIH ≥ 2V) at VCC = 4.5-5.5V |
| 8 | A7 | input | A7 input for buffer/driver channel 7; TTL-compatible (VIL ≤ 0.8V, VIH ≥ 2V) at VCC = 4.5-5.5V |
| 9 | A8 | input | A8 input for buffer/driver channel 8; TTL-compatible (VIL ≤ 0.8V, VIH ≥ 2V) at VCC = 4.5-5.5V |
| 10 | GND | power_in | Ground (0V logic reference); supports continuous current up to 75 mA |
| 11 | Y8 | tri_state | Y8 tri-state inverted output for channel 8; outputs inverted A8 data (IOL = 8 mA, IOH = −8 mA) when enabled by OE1 or OE2 low, high-impedance otherwise |
| 12 | Y7 | tri_state | Y7 tri-state inverted output for channel 7; outputs inverted A7 data (IOL = 8 mA, IOH = −8 mA) when enabled by OE1 or OE2 low, high-impedance otherwise |
| 13 | Y6 | tri_state | Y6 tri-state inverted output for channel 6; outputs inverted A6 data (IOL = 8 mA, IOH = −8 mA) when enabled by OE1 or OE2 low, high-impedance otherwise |
| 14 | Y5 | tri_state | Y5 tri-state inverted output for channel 5; outputs inverted A5 data (IOL = 8 mA, IOH = −8 mA) when enabled by OE1 or OE2 low, high-impedance otherwise |
| 15 | Y4 | tri_state | Y4 tri-state inverted output for channel 4; outputs inverted A4 data (IOL = 8 mA, IOH = −8 mA) when enabled by OE1 or OE2 low, high-impedance otherwise |
| 16 | Y3 | tri_state | Y3 tri-state inverted output for channel 3; outputs inverted A3 data (IOL = 8 mA, IOH = −8 mA) when enabled by OE1 or OE2 low, high-impedance otherwise |
| 17 | Y2 | tri_state | Y2 tri-state inverted output for channel 2; outputs inverted A2 data (IOL = 8 mA, IOH = −8 mA) when enabled by OE1 or OE2 low, high-impedance otherwise |
| 18 | Y1 | tri_state | Y1 tri-state inverted output for channel 1; outputs inverted A1 data (IOL = 8 mA, IOH = −8 mA) when enabled by OE1 or OE2 low, high-impedance otherwise |
| 19 | OE2 | input | Active-low Output Enable 2 input (0-5.5V logic); high level forces all Y outputs to high-impedance state |
| 20 | VCC | power_in | Positive power supply; recommended operating range 4.5 V to 5.5 V; supports continuous current up to 75 mA |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |

## CAD (KiCad official)

- Symbol: `SN74AHCT540DWR`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `sn74ahct540dwr-etched.step` / `sn74ahct540dwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74ahct540dwr.step` / `sn74ahct540dwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74ahct540) (36 pp, sha256 `98777c156119ae97`, retrieved 2026-10-05, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74ahct540dwr-datasheet.pdf)