component
SN74AHCT1G86DCKR
Public Made by Adomby adom
UMW Gates, SC-70-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
sn74ahct1g86dckr: backfill missing artifacts (etch, variants)
3 files changed
+22002−7
diff truncated
README.md+3−1@@ -25,7 +25,9 @@ SN74AHCT1G86DCKR from UMW, in a SC-70-5. Pinout and pin descriptions extracted f ## Ordering variants -- `SN74AHCT1G86DCKRDCKR`+Same part, different packaging or reel option.++- `SN74AHCT1G86DCKR` - `SN74AHCT1G86DCKRDCKT` - `SN74AHCT1G86DCKRDBVR` - `SN74AHCT1G86DCKRDBVT`
page.json+25−6@@ -34,13 +34,13 @@ "number": "1", "name": "A", "type": "input",- "description": "Logic input A of the 2-input XOR gate. TTL-compatible input (VIH \u2265 2 V, VIL \u2264 0.8 V) over VCC = 4.5-5.5 V. Input current is \u00b11 \u00b5A max; input capacitance is typically 3 pF."+ "description": "Logic input A of the 2-input XOR gate. TTL-compatible input (VIH ≥ 2 V, VIL ≤ 0.8 V) over VCC = 4.5-5.5 V. Input current is ±1 µA max; input capacitance is typically 3 pF." }, { "number": "2", "name": "B", "type": "input",- "description": "Logic input B of the 2-input XOR gate. TTL-compatible input (VIH \u2265 2 V, VIL \u2264 0.8 V) over VCC = 4.5-5.5 V. Input current is \u00b11 \u00b5A max; input capacitance is typically 3 pF."+ "description": "Logic input B of the 2-input XOR gate. TTL-compatible input (VIH ≥ 2 V, VIL ≤ 0.8 V) over VCC = 4.5-5.5 V. Input current is ±1 µA max; input capacitance is typically 3 pF." }, { "number": "3",@@ -52,13 +52,13 @@ "number": "4", "name": "Y", "type": "output",- "description": "Push-pull XOR output, Y = A \u2295 B. Sources/sinks up to 8 mA at VCC = 4.5 V with VOH \u2265 3.8 V and VOL \u2264 0.44 V. Typical propagation delay 2.5 ns (CL = 15 pF, VCC = 5 V)."+ "description": "Push-pull XOR output, Y = A ⊕ B. Sources/sinks up to 8 mA at VCC = 4.5 V with VOH ≥ 3.8 V and VOL ≤ 0.44 V. Typical propagation delay 2.5 ns (CL = 15 pF, VCC = 5 V)." }, { "number": "5", "name": "VCC", "type": "power_in",- "description": "Positive supply pin. Recommended operating range 4.5 V to 5.5 V (abs max 7 V). Quiescent supply current ICC \u2264 10 \u00b5A. Decouple locally with a 0.1 \u00b5F ceramic capacitor to GND."+ "description": "Positive supply pin. Recommended operating range 4.5 V to 5.5 V (abs max 7 V). Quiescent supply current ICC ≤ 10 µA. Decouple locally with a 0.1 µF ceramic capacitor to GND." } ], "provenance": {@@ -132,9 +132,28 @@ "docs/hero.png", "docs/sn74ahct1g86dckr-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "sn74ahct1g86dckr-etched.step" ], "visibility": { "public": true- }+ },+ "variants": [+ {+ "mpn": "SN74AHCT1G86DCKR",+ "kind": "packaging"+ },+ {+ "mpn": "SN74AHCT1G86DCKRDCKT",+ "kind": "packaging"+ },+ {+ "mpn": "SN74AHCT1G86DCKRDBVR",+ "kind": "packaging"+ },+ {+ "mpn": "SN74AHCT1G86DCKRDBVT",+ "kind": "packaging"+ }+ ] }
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