main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 5h ago
viewers sn74ahct1g08dckt: viewers · Ray 5h ago
package.json Publish 0.1.0 · Ray 5h ago
page.json Set visibility: public · Ray 5h ago
README.md Publish 0.1.0 · Ray 5h ago
sn74ahct1g08dckt-etched.glb Publish 0.1.0 · Ray 5h ago
sn74ahct1g08dckt-etched.step sn74ahct1g08dckt: factory component page (tier=mfr) · Ray 5h ago
sn74ahct1g08dckt-hero.glb sn74ahct1g08dckt: hero GLB from the etched model (keeps the MPN mark) · Ray 5h ago
sn74ahct1g08dckt-hero.overlay.json Publish 0.1.0 · Ray 5h ago
sn74ahct1g08dckt.glb Publish 0.1.0 · Ray 5h ago
sn74ahct1g08dckt.kicad_mod Publish 0.1.0 · Ray 5h ago
sn74ahct1g08dckt.kicad_sym Publish 0.1.0 · Ray 5h ago
sn74ahct1g08dckt.lbr Publish 0.1.0 · Ray 5h ago
sn74ahct1g08dckt.step Publish 0.1.0 · Ray 5h ago
verification.json Verified: Published by the parts factory: tier mfr, 5 pins · Ray 5h ago

SN74AHCT1G08DCKT

Texas Instruments · Logic Gates · SC-70-5

SN74AHCT1G08DCKT from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Logic input A; the recommended input voltage range is 0 V to 5.5 V, with VIH of 2 V minimum and VIL of 0.8 V maximum.
2 B input Logic input B; the recommended input voltage range is 0 V to 5.5 V, with VIH of 2 V minimum and VIL of 0.8 V maximum.
3 GND power_in Ground reference pin for the device.
4 Y output Logic output Y; load current must not exceed 25 mA per output and the output must not be pulled above VCC.
5 VCC power_in Supply pin; the recommended supply voltage range is 4.5 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SC-70-5
Category Logic
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High-level output voltage VOH 4.4 4.5 V IOH = -50 µA, VCC = 4.5 V, TA = 25°C 5
High-level output voltage VOH 4.4 V IOH = -50 µA, VCC = 4.5 V, TA = -40°C to 125°C 5
High-level output voltage VOH 3.94 V IOH = -8 mA, VCC = 4.5 V, TA = 25°C 5
High-level output voltage VOH 3.8 V IOH = -8 mA, VCC = 4.5 V, TA = -40°C to 125°C 5
Low-level output voltage VOL 0.1 V IOL = 50 µA, VCC = 4.5 V 5
Low-level output voltage VOL 0.36 V IOL = 8 mA, VCC = 4.5 V, TA = 25°C 5
Low-level output voltage VOL 0.44 V IOL = 8 mA, VCC = 4.5 V, TA = -40°C to 125°C 5
Input current II -0.1 0.1 µA VI = 5.5 V or GND, VCC = 0 V to 5.5 V, TA = 25°C 5
Input current II -1 1 µA VI = 5.5 V or GND, VCC = 0 V to 5.5 V, TA = -40°C to 125°C 5
Supply current ICC 1 µA VI = VCC or GND, IO = 0, VCC = 5.5 V, TA = 25°C 5
Supply current ICC 10 µA VI = VCC or GND, IO = 0, VCC = 5.5 V, TA = -40°C to 125°C 5
Change in supply current ΔICC 1.35 mA One input at 3.4 V, Other Inputs at VCC or GND, VCC = 5.5 V, TA = 25°C 5
Change in supply current ΔICC 1.5 mA One input at 3.4 V, Other Inputs at VCC or GND, VCC = 5.5 V, TA = -40°C to 125°C 5
Input capacitance CI 4 10 pF VI = VCC or GND, VCC = 5 V 5
Propagation delay, low to high transition (A or B to Y) tPLH 1 7.1 ns CL = 15 pF, VCC = 5 V ± 0.5 V, TA = -40°C to 85°C 6
Propagation delay, high to low transition (A or B to Y) tPHL 1 7.1 ns CL = 15 pF, VCC = 5 V ± 0.5 V, TA = -40°C to 85°C 6
Propagation delay, low to high transition (A or B to Y) tPLH 1 7.5 ns CL = 15 pF, VCC = 5 V ± 0.5 V, TA = -40°C to 125°C 6
Propagation delay, high to low transition (A or B to Y) tPHL 1 7.5 ns CL = 15 pF, VCC = 5 V ± 0.5 V, TA = -40°C to 125°C 6
Propagation delay, low to high transition (A or B to Y) tPLH 5 6.2 ns CL = 15 pF, VCC = 5 V ± 0.5 V, TA = 25°C 6
Propagation delay, high to low transition (A or B to Y) tPHL 5 6.2 ns CL = 15 pF, VCC = 5 V ± 0.5 V, TA = 25°C 6
Propagation delay, low to high transition (A or B to Y) tPLH 5.5 7.9 ns CL = 50 pF, VCC = 5 V ± 0.5 V, TA = 25°C 6
Propagation delay, high to low transition (A or B to Y) tPHL 5.5 7.9 ns CL = 50 pF, VCC = 5 V ± 0.5 V, TA = 25°C 6
Propagation delay, low to high transition (A or B to Y) tPLH 1 9 ns CL = 50 pF, VCC = 5 V ± 0.5 V, TA = -40°C to 85°C 6
Propagation delay, high to low transition (A or B to Y) tPHL 1 9 ns CL = 50 pF, VCC = 5 V ± 0.5 V, TA = -40°C to 85°C 6
Propagation delay, low to high transition (A or B to Y) tPLH 1 10 ns CL = 50 pF, VCC = 5 V ± 0.5 V, TA = -40°C to 125°C 6
Propagation delay, high to low transition (A or B to Y) tPHL 1 10 ns CL = 50 pF, VCC = 5 V ± 0.5 V, TA = -40°C to 125°C 6
Supply voltage VCC 4.5 5.5 V 4
High-level input voltage VIH 2 V 4
Low-level input voltage VIL 0.8 V 4
Input voltage VI 0 5.5 V 4
Output voltage VO 0 V maximum is VCC 4
High-level output current IOH -8 mA 4
Low-level output current IOL 8 mA 4
Input transition rise and fall rate Δt/Δv 20 ns/V 4
Operating free-air temperature TA -40 125 °C 4
Supply voltage VCC -0.5 7 V 4
Input voltage VI -0.5 7 V 4
Output voltage VO -0.5 V maximum is VCC + 0.5 V 4
Input clamp current IIK -20 mA VI < 0 4
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC 4
Continuous output current IO -25 25 mA VO = 0 to VCC 4
Continuous current through VCC or GND -50 50 mA 4
Maximum junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Junction-to-ambient thermal resistance RθJA 289.2 °C/W DCK (SC70) 5-pin package 5
Junction-to-case (top) thermal resistance RθJC(top) 205.8 °C/W DCK (SC70) 5-pin package 5
Junction-to-board thermal resistance RθJB 176.2 °C/W DCK (SC70) 5-pin package 5
Junction-to-top characterization parameter ψJT 117.6 °C/W DCK (SC70) 5-pin package 5
Junction-to-board characterization parameter ψJB 175.1 °C/W DCK (SC70) 5-pin package 5

CAD (KiCad official)

  • Symbol: SN74AHCT1G08DCKT
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SC-70-5 (KiCad packages3D, STEP)
  • 3D model files: sn74ahct1g08dckt-etched.step / sn74ahct1g08dckt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ahct1g08dckt.step / sn74ahct1g08dckt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 557340852460f440, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF