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Contents

README

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SN74AHCT139DR

Texas Instruments · Signal Switches, Multiplexers, Decoders · SOP-16

SN74AHCT139DR from Texas Instruments, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1G input Active-low enable input for decoder 1 that disables all Y0-Y3 outputs when high or enables decoder output selection via inputs 1A and 1B when low (VIH≥2V, VIL≤0.8V).
2 1A input Select input A for decoder 1 that, in combination with 1B, determines which output Y0-Y3 is driven low when enable input 1G is low (VIH≥2V, VIL≤0.8V).
3 1B input Select input B for decoder 1 that, in combination with 1A, determines which output Y0-Y3 is driven low when enable input 1G is low (VIH≥2V, VIL≤0.8V).
4 1Y0 output Active-low output Y0 for decoder 1, driven low when 1G=low, 1A=low, and 1B=low (max IOL=8mA, max VOL=0.44V).
5 1Y1 output Active-low output Y1 for decoder 1, driven low when 1G=low, 1A=high, and 1B=low (max IOL=8mA, max VOL=0.44V).
6 1Y2 output Active-low output Y2 for decoder 1, driven low when 1G=low, 1A=low, and 1B=high (max IOL=8mA, max VOL=0.44V).
7 1Y3 output Active-low output Y3 for decoder 1, driven low when 1G=low, 1A=high, and 1B=high (max IOL=8mA, max VOL=0.44V).
8 GND power_in Ground connection providing 0V reference for the device.
9 2Y3 output Active-low output Y3 for decoder 2, driven low when 2G=low, 2A=high, and 2B=high (max IOL=8mA, max VOL=0.44V).
10 2Y2 output Active-low output Y2 for decoder 2, driven low when 2G=low, 2A=low, and 2B=high (max IOL=8mA, max VOL=0.44V).
11 2Y1 output Active-low output Y1 for decoder 2, driven low when 2G=low, 2A=high, and 2B=low (max IOL=8mA, max VOL=0.44V).
12 2Y0 output Active-low output Y0 for decoder 2, driven low when 2G=low, 2A=low, and 2B=low (max IOL=8mA, max VOL=0.44V).
13 2B input Select input B for decoder 2 that, in combination with 2A, determines which output Y0-Y3 is driven low when enable input 2G is low (VIH≥2V, VIL≤0.8V).
14 2A input Select input A for decoder 2 that, in combination with 2B, determines which output Y0-Y3 is driven low when enable input 2G is low (VIH≥2V, VIL≤0.8V).
15 2G input Active-low enable input for decoder 2 that disables all Y0-Y3 outputs when high or enables decoder output selection via inputs 2A and 2B when low (VIH≥2V, VIL≤0.8V).
16 VCC power_in Supply voltage for the device; 4.5V to 5.5V nominal operation per AHCT design specification.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOP-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: SN74AHCT139DR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74ahct139dr-etched.step / sn74ahct139dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ahct139dr.step / sn74ahct139dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (20 pp, sha256 e75cb61da2840c39, retrieved 2026-09-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF