component
SN74AHCT08QPWRQ1
Public Made by Adomby adom
Texas Instruments Logic ICs, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74AHCT08QPWRQ1
Texas Instruments · Logic ICs · TSSOP-14
SN74AHCT08QPWRQ1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Channel 1 gate input A, an overvoltage-tolerant TTL-compatible input with an input voltage range of 0 V to 5.5 V. |
| 2 | 1B | input | Channel 1 gate input B, an overvoltage-tolerant TTL-compatible input with an input voltage range of 0 V to 5.5 V. |
| 3 | 1Y | output | Channel 1 gate output Y, a low-drive output with IOH of -8 mA and IOL of 8 mA recommended. |
| 4 | 2A | input | Channel 2 gate input A, an overvoltage-tolerant TTL-compatible input with an input voltage range of 0 V to 5.5 V. |
| 5 | 2B | input | Channel 2 gate input B, an overvoltage-tolerant TTL-compatible input with an input voltage range of 0 V to 5.5 V. |
| 6 | 2Y | output | Channel 2 gate output Y, a low-drive output with IOH of -8 mA and IOL of 8 mA recommended. |
| 7 | GND | power_in | Ground reference for the device, to which unused inputs may be tied. |
| 8 | 3Y | output | Channel 3 gate output Y, a low-drive output with IOH of -8 mA and IOL of 8 mA recommended. |
| 9 | 3A | input | Channel 3 gate input A, an overvoltage-tolerant TTL-compatible input with an input voltage range of 0 V to 5.5 V. |
| 10 | 3B | input | Channel 3 gate input B, an overvoltage-tolerant TTL-compatible input with an input voltage range of 0 V to 5.5 V. |
| 11 | 4Y | output | Channel 4 gate output Y, a low-drive output with IOH of -8 mA and IOL of 8 mA recommended. |
| 12 | 4A | input | Channel 4 gate input A, an overvoltage-tolerant TTL-compatible input with an input voltage range of 0 V to 5.5 V. |
| 13 | 4B | input | Channel 4 gate input B, an overvoltage-tolerant TTL-compatible input with an input voltage range of 0 V to 5.5 V. |
| 14 | VCC | power_in | Positive supply, with a recommended operating range of 4.5 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| Input voltage range | VI | -0.5 | 7 | V | 4 | ||
| Output voltage range | VO | -0.5 | V | VCC + 0.5 V as printed | 4 | ||
| Input clamp current | IIK | -20 | mA | VI < 0 | 4 | ||
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC | 4 | |
| Continuous output current | IO | -25 | 25 | mA | VO = 0 to VCC | 4 | |
| Continuous current through VCC or GND | -50 | 50 | mA | 4 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VCC | 4.5 | 5.5 | V | 4 | ||
| High-level input voltage | VIH | 2 | V | 4 | |||
| Low-level input voltage | VIL | 0.8 | V | 4 | |||
| Input voltage | VI | 0 | 5.5 | V | 4 | ||
| Output voltage | VO | 0 | V | VCC | 4 | ||
| High-level output current | IOH | -8 | mA | 4 | |||
| Low-level output current | IOL | 8 | mA | 4 | |||
| Input transition rise or fall rate | Δt/Δv | 20 | ns/V | 4 | |||
| Operating free-air temperature | TA | -40 | 125 | °C | 4 | ||
| Junction-to-ambient thermal resistance, PW (TSSOP) package | RθJA | 113 | °C/W | 5 | |||
| High-level output voltage | VOH | 4.4 | 4.5 | V | IOH = -50 µA, VCC = 4.5 V, TA = 25°C | 5 | |
| High-level output voltage | VOH | 4.4 | V | IOH = -50 µA, VCC = 4.5 V, TA = -40°C to 125°C | 5 | ||
| High-level output voltage | VOH | 3.94 | V | IOH = -8 mA, VCC = 4.5 V, TA = 25°C | 5 | ||
| High-level output voltage | VOH | 3.8 | V | IOH = -8 mA, VCC = 4.5 V, TA = -40°C to 125°C | 5 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 50 µA, VCC = 4.5 V, TA = 25°C | 5 | ||
| Low-level output voltage | VOL | 0.36 | V | IOL = 8 mA, VCC = 4.5 V, TA = 25°C | 5 | ||
| Low-level output voltage | VOL | 0.44 | V | IOL = 8 mA, VCC = 4.5 V, TA = -40°C to 125°C | 5 | ||
| Input current | II | -0.1 | 0.1 | µA | VI = 5.5 V or GND, VCC = 0 V to 5.5 V, TA = 25°C | 5 | |
| Input current | II | -1 | 1 | µA | VI = 5.5 V or GND, VCC = 0 V to 5.5 V, TA = -40°C to 125°C | 5 | |
| Quiescent supply current | ICC | 2 | µA | VI = VCC or GND, IO = 0, VCC = 5.5 V, TA = 25°C | 5 | ||
| Quiescent supply current | ICC | 20 | µA | VI = VCC or GND, IO = 0, VCC = 5.5 V, TA = -40°C to 125°C | 5 | ||
| Supply current increase per input at TTL level | ΔICC | 1.35 | mA | One input at 3.4 V, other inputs at VCC or GND, VCC = 5.5 V, TA = 25°C | 5 | ||
| Supply current increase per input at TTL level | ΔICC | 1.5 | mA | One input at 3.4 V, other inputs at VCC or GND, VCC = 5.5 V, TA = -40°C to 125°C | 5 | ||
| Input capacitance | Ci | 4 | 10 | pF | VI = VCC or GND, VCC = 5 V, TA = 25°C | 5 | |
| Input capacitance | Ci | 10 | pF | VI = VCC or GND, VCC = 5 V, TA = -40°C to 125°C | 5 | ||
| Propagation delay time, low-to-high-level output | tPLH | 5 | 6.9 | ns | A or B to Y, CL = 15 pF, VCC = 5 V ± 0.5 V, TA = 25°C | 5 | |
| Propagation delay time, low-to-high-level output | tPLH | 1 | 8 | ns | A or B to Y, CL = 15 pF, VCC = 5 V ± 0.5 V, TA = -40°C to 125°C | 5 | |
| Propagation delay time, high-to-low-level output | tPHL | 5 | 6.9 | ns | A or B to Y, CL = 15 pF, VCC = 5 V ± 0.5 V, TA = 25°C | 5 | |
| Propagation delay time, high-to-low-level output | tPHL | 1 | 8 | ns | A or B to Y, CL = 15 pF, VCC = 5 V ± 0.5 V, TA = -40°C to 125°C | 5 | |
| Propagation delay time, low-to-high-level output | tPLH | 5.5 | 7.9 | ns | A or B to Y, CL = 50 pF, VCC = 5 V ± 0.5 V, TA = 25°C | 5 | |
| Propagation delay time, low-to-high-level output | tPLH | 1 | 9 | ns | A or B to Y, CL = 50 pF, VCC = 5 V ± 0.5 V, TA = -40°C to 125°C | 5 | |
| Propagation delay time, high-to-low-level output | tPHL | 5.5 | 7.9 | ns | A or B to Y, CL = 50 pF, VCC = 5 V ± 0.5 V, TA = 25°C | 5 | |
| Propagation delay time, high-to-low-level output | tPHL | 1 | 9 | ns | A or B to Y, CL = 50 pF, VCC = 5 V ± 0.5 V, TA = -40°C to 125°C | 5 |
CAD (KiCad official)
- Symbol:
SN74AHCT08QPWRQ1 - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74ahct08qpwrq1-etched.step/sn74ahct08qpwrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ahct08qpwrq1.step/sn74ahct08qpwrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (20 pp, sha256
3cdd6084ff9633ab, retrieved 2026-10-17, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed (audit)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).