component
SN74AHCT00DBR
Public Made by Adomby adom
Texas Instruments Logic Gates, SSOP-14-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownSN74AHCT00DBR
Texas Instruments · Logic Gates · SSOP-14-208mil
SN74AHCT00DBR from Texas Instruments, in a SSOP-14-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Channel 1 NAND Input A; TTL-compatible CMOS input requiring VIH ≥ 2V, VIL ≤ 0.8V |
| 2 | 1B | input | Channel 1 NAND Input B; TTL-compatible CMOS input requiring VIH ≥ 2V, VIL ≤ 0.8V |
| 3 | 1Y | output | Channel 1 NAND Output Y; drives ±8mA with VOH ≥ 4.4V min or VOL ≤ 0.44V max; load capacitance ≤ 50pF recommended |
| 4 | 2A | input | Channel 2 NAND Input A; TTL-compatible CMOS input requiring VIH ≥ 2V, VIL ≤ 0.8V |
| 5 | 2B | input | Channel 2 NAND Input B; TTL-compatible CMOS input requiring VIH ≥ 2V, VIL ≤ 0.8V |
| 6 | 2Y | output | Channel 2 NAND Output Y; drives ±8mA with VOH ≥ 4.4V min or VOL ≤ 0.44V max; load capacitance ≤ 50pF recommended |
| 7 | GND | power_in | Ground (0V reference); current return path |
| 8 | 3Y | output | Channel 3 NAND Output Y; drives ±8mA with VOH ≥ 4.4V min or VOL ≤ 0.44V max; load capacitance ≤ 50pF recommended |
| 9 | 3A | input | Channel 3 NAND Input A; TTL-compatible CMOS input requiring VIH ≥ 2V, VIL ≤ 0.8V |
| 10 | 3B | input | Channel 3 NAND Input B; TTL-compatible CMOS input requiring VIH ≥ 2V, VIL ≤ 0.8V |
| 11 | 4Y | output | Channel 4 NAND Output Y; drives ±8mA with VOH ≥ 4.4V min or VOL ≤ 0.44V max; load capacitance ≤ 50pF recommended |
| 12 | 4A | input | Channel 4 NAND Input A; TTL-compatible CMOS input requiring VIH ≥ 2V, VIL ≤ 0.8V |
| 13 | 4B | input | Channel 4 NAND Input B; TTL-compatible CMOS input requiring VIH ≥ 2V, VIL ≤ 0.8V |
| 14 | VCC | power_in | Positive supply voltage 4.5V to 5.5V; bypass capacitor to GND recommended close to pin |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-14-208mil |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74AHCT00DBR - Footprint:
Package_SO:SSOP-14_5.3x6.2mm_P0.65mm - 3D model: SSOP-14-208mil (KiCad packages3D, STEP)
- 3D model files:
sn74ahct00dbr-etched.step/sn74ahct00dbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ahct00dbr.step/sn74ahct00dbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (43 pp, sha256
f8260ae34dd0c6d7, retrieved 2026-09-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).