component
SN74AHC74QDRQ1
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74AHC74QDRQ1
Texas Instruments · Flip Flops · SOIC-14
SN74AHC74QDRQ1 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1CLR | input | Active-low asynchronous clear for flip-flop 1; a low level resets 1Q low regardless of the other inputs. |
| 2 | 1D | input | Data input for flip-flop 1; data meeting the setup and hold time requirements is transferred to 1Q on the positive-going edge of 1CLK when PRE and CLR are inactive (high). |
| 3 | 1CLK | input | Clock input for flip-flop 1; triggering occurs on the positive-going edge at a voltage level, not directly tied to the clock rise time. |
| 4 | 1PRE | input | Active-low asynchronous preset for flip-flop 1; a low level sets 1Q high regardless of the other inputs. |
| 5 | 1Q | output | True output of flip-flop 1. |
| 6 | ~{1Q} | output | Complementary output of flip-flop 1. |
| 7 | GND | power_in | Ground reference pin for the device. |
| 8 | ~{2Q} | output | Complementary output of flip-flop 2. |
| 9 | 2Q | output | True output of flip-flop 2. |
| 10 | 2PRE | input | Active-low asynchronous preset for flip-flop 2; a low level sets 2Q high regardless of the other inputs. |
| 11 | 2CLK | input | Clock input for flip-flop 2; triggering occurs on the positive-going edge at a voltage level, not directly tied to the clock rise time. |
| 12 | 2D | input | Data input for flip-flop 2; data meeting the setup and hold time requirements is transferred to 2Q on the positive-going edge of 2CLK when PRE and CLR are inactive (high). |
| 13 | 2CLR | input | Active-low asynchronous clear for flip-flop 2; a low level resets 2Q low regardless of the other inputs. |
| 14 | VCC | power_in | Supply voltage; the recommended operating range is 2 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2 | 5.5 | V | 3 | ||
| High-level input voltage | VIH | 1.5 | V | VCC = 2 V | 3 | ||
| High-level input voltage | VIH | 2.1 | V | VCC = 3 V | 3 | ||
| High-level input voltage | VIH | 3.85 | V | VCC = 5.5 V | 3 | ||
| Low-level input voltage | VIL | 0.5 | V | VCC = 2 V | 3 | ||
| Low-level input voltage | VIL | 0.9 | V | VCC = 3 V | 3 | ||
| Low-level input voltage | VIL | 1.65 | V | VCC = 5.5 V | 3 | ||
| Input voltage | VI | 0 | 5.5 | V | 3 | ||
| Output voltage | VO | 0 | V | upper limit printed as VCC | 3 | ||
| High-level output current | IOH | -50 | µA | VCC = 2 V | 3 | ||
| High-level output current | IOH | -4 | mA | VCC = 3.3 V ± 0.3 V | 3 | ||
| High-level output current | IOH | -8 | mA | VCC = 5 V ± 0.5 V | 3 | ||
| Low-level output current | IOL | 50 | µA | VCC = 2 V | 3 | ||
| Low-level output current | IOL | 4 | mA | VCC = 3.3 V ± 0.3 V | 3 | ||
| Low-level output current | IOL | 8 | mA | VCC = 5 V ± 0.5 V | 3 | ||
| Input transition rise or fall rate | Δt/Δv | 100 | ns/V | VCC = 3.3 V ± 0.3 V | 3 | ||
| Input transition rise or fall rate | Δt/Δv | 20 | ns/V | VCC = 5 V ± 0.5 V | 3 | ||
| Operating free-air temperature | TA | -40 | 125 | °C | 3 | ||
| Supply voltage range | VCC | -0.5 | 7 | V | 3 | ||
| Input voltage range | VI | -0.5 | 7 | V | see Note 1 | 3 | |
| Output voltage range | VO | -0.5 | V | see Note 1; upper limit printed as VCC + 0.5 V | 3 | ||
| Input clamp current | IIK | -20 | mA | VI < 0 | 3 | ||
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC | 3 | |
| Continuous output current | IO | -25 | 25 | mA | VO = 0 to VCC | 3 | |
| Continuous current through VCC or GND | -50 | 50 | mA | 3 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| High-level output voltage | VOH | 1.9 | 2 | V | IOH = −50 µA, VCC = 2 V, TA = 25°C | 4 | |
| High-level output voltage | VOH | 1.9 | V | IOH = −50 µA, VCC = 2 V, over recommended operating free-air temperature range | 4 | ||
| High-level output voltage | VOH | 2.9 | 3 | V | IOH = −50 µA, VCC = 3 V, TA = 25°C | 4 | |
| High-level output voltage | VOH | 2.9 | V | IOH = −50 µA, VCC = 3 V, over recommended operating free-air temperature range | 4 | ||
| High-level output voltage | VOH | 4.4 | 4.5 | V | IOH = −50 µA, VCC = 4.5 V, TA = 25°C | 4 | |
| High-level output voltage | VOH | 4.4 | V | IOH = −50 µA, VCC = 4.5 V, over recommended operating free-air temperature range | 4 | ||
| High-level output voltage | VOH | 2.58 | V | IOH = −4 mA, VCC = 3 V, TA = 25°C | 4 | ||
| High-level output voltage | VOH | 2.48 | V | IOH = −4 mA, VCC = 3 V, over recommended operating free-air temperature range | 4 | ||
| High-level output voltage | VOH | 3.94 | V | IOH = −8 mA, VCC = 4.5 V, TA = 25°C | 4 | ||
| High-level output voltage | VOH | 3.8 | V | IOH = −8 mA, VCC = 4.5 V, over recommended operating free-air temperature range | 4 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 50 µA, VCC = 2 V, TA = 25°C | 4 | ||
| Low-level output voltage | VOL | 0.36 | V | IOL = 4 mA, VCC = 3 V, TA = 25°C | 4 | ||
| Low-level output voltage | VOL | 0.5 | V | IOL = 4 mA, VCC = 3 V, over recommended operating free-air temperature range | 4 | ||
| Input leakage current | II | -0.1 | 0.1 | µA | VI = 5.5 V or GND, VCC = 0 V to 5.5 V, TA = 25°C | 4 | |
| Input leakage current | II | -1 | 1 | µA | VI = 5.5 V or GND, VCC = 0 V to 5.5 V, over recommended operating free-air temperature range | 4 | |
| Supply current | ICC | 2 | µA | VI = VCC or GND, IO = 0, VCC = 5.5 V, TA = 25°C | 4 | ||
| Supply current | ICC | 20 | µA | VI = VCC or GND, IO = 0, VCC = 5.5 V, over recommended operating free-air temperature range | 4 | ||
| Input capacitance | Ci | 2 | 10 | pF | VI = VCC or GND, VCC = 5 V, TA = 25°C | 4 | |
| Package thermal impedance | θJA | 86 | °C/W | D package, see Note 2 | 3 |
CAD (KiCad official)
- Symbol:
SN74AHC74QDRQ1 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74ahc74qdrq1-etched.step/sn74ahc74qdrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ahc74qdrq1.step/sn74ahc74qdrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (14 pp, sha256
3d0eb1da711facb8, retrieved 2026-10-17, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74AHC74QDRQ1
**Texas Instruments** · Flip Flops · SOIC-14
SN74AHC74QDRQ1 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1CLR | input | Active-low asynchronous clear for flip-flop 1; a low level resets 1Q low regardless of the other inputs. |
| 2 | 1D | input | Data input for flip-flop 1; data meeting the setup and hold time requirements is transferred to 1Q on the positive-going edge of 1CLK when PRE and CLR are inactive (high). |
| 3 | 1CLK | input | Clock input for flip-flop 1; triggering occurs on the positive-going edge at a voltage level, not directly tied to the clock rise time. |
| 4 | 1PRE | input | Active-low asynchronous preset for flip-flop 1; a low level sets 1Q high regardless of the other inputs. |
| 5 | 1Q | output | True output of flip-flop 1. |
| 6 | ~{1Q} | output | Complementary output of flip-flop 1. |
| 7 | GND | power_in | Ground reference pin for the device. |
| 8 | ~{2Q} | output | Complementary output of flip-flop 2. |
| 9 | 2Q | output | True output of flip-flop 2. |
| 10 | 2PRE | input | Active-low asynchronous preset for flip-flop 2; a low level sets 2Q high regardless of the other inputs. |
| 11 | 2CLK | input | Clock input for flip-flop 2; triggering occurs on the positive-going edge at a voltage level, not directly tied to the clock rise time. |
| 12 | 2D | input | Data input for flip-flop 2; data meeting the setup and hold time requirements is transferred to 2Q on the positive-going edge of 2CLK when PRE and CLR are inactive (high). |
| 13 | 2CLR | input | Active-low asynchronous clear for flip-flop 2; a low level resets 2Q low regardless of the other inputs. |
| 14 | VCC | power_in | Supply voltage; the recommended operating range is 2 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2 | | 5.5 | V | | 3 |
| High-level input voltage | VIH | 1.5 | | | V | VCC = 2 V | 3 |
| High-level input voltage | VIH | 2.1 | | | V | VCC = 3 V | 3 |
| High-level input voltage | VIH | 3.85 | | | V | VCC = 5.5 V | 3 |
| Low-level input voltage | VIL | | | 0.5 | V | VCC = 2 V | 3 |
| Low-level input voltage | VIL | | | 0.9 | V | VCC = 3 V | 3 |
| Low-level input voltage | VIL | | | 1.65 | V | VCC = 5.5 V | 3 |
| Input voltage | VI | 0 | | 5.5 | V | | 3 |
| Output voltage | VO | 0 | | | V | upper limit printed as VCC | 3 |
| High-level output current | IOH | | | -50 | µA | VCC = 2 V | 3 |
| High-level output current | IOH | | | -4 | mA | VCC = 3.3 V ± 0.3 V | 3 |
| High-level output current | IOH | | | -8 | mA | VCC = 5 V ± 0.5 V | 3 |
| Low-level output current | IOL | | | 50 | µA | VCC = 2 V | 3 |
| Low-level output current | IOL | | | 4 | mA | VCC = 3.3 V ± 0.3 V | 3 |
| Low-level output current | IOL | | | 8 | mA | VCC = 5 V ± 0.5 V | 3 |
| Input transition rise or fall rate | Δt/Δv | | | 100 | ns/V | VCC = 3.3 V ± 0.3 V | 3 |
| Input transition rise or fall rate | Δt/Δv | | | 20 | ns/V | VCC = 5 V ± 0.5 V | 3 |
| Operating free-air temperature | TA | -40 | | 125 | °C | | 3 |
| Supply voltage range | VCC | -0.5 | | 7 | V | | 3 |
| Input voltage range | VI | -0.5 | | 7 | V | see Note 1 | 3 |
| Output voltage range | VO | -0.5 | | | V | see Note 1; upper limit printed as VCC + 0.5 V | 3 |
| Input clamp current | IIK | -20 | | | mA | VI < 0 | 3 |
| Output clamp current | IOK | -20 | | 20 | mA | VO < 0 or VO > VCC | 3 |
| Continuous output current | IO | -25 | | 25 | mA | VO = 0 to VCC | 3 |
| Continuous current through VCC or GND | | -50 | | 50 | mA | | 3 |
| Storage temperature range | Tstg | -65 | | 150 | °C | | 3 |
| High-level output voltage | VOH | 1.9 | 2 | | V | IOH = −50 µA, VCC = 2 V, TA = 25°C | 4 |
| High-level output voltage | VOH | 1.9 | | | V | IOH = −50 µA, VCC = 2 V, over recommended operating free-air temperature range | 4 |
| High-level output voltage | VOH | 2.9 | 3 | | V | IOH = −50 µA, VCC = 3 V, TA = 25°C | 4 |
| High-level output voltage | VOH | 2.9 | | | V | IOH = −50 µA, VCC = 3 V, over recommended operating free-air temperature range | 4 |
| High-level output voltage | VOH | 4.4 | 4.5 | | V | IOH = −50 µA, VCC = 4.5 V, TA = 25°C | 4 |
| High-level output voltage | VOH | 4.4 | | | V | IOH = −50 µA, VCC = 4.5 V, over recommended operating free-air temperature range | 4 |
| High-level output voltage | VOH | 2.58 | | | V | IOH = −4 mA, VCC = 3 V, TA = 25°C | 4 |
| High-level output voltage | VOH | 2.48 | | | V | IOH = −4 mA, VCC = 3 V, over recommended operating free-air temperature range | 4 |
| High-level output voltage | VOH | 3.94 | | | V | IOH = −8 mA, VCC = 4.5 V, TA = 25°C | 4 |
| High-level output voltage | VOH | 3.8 | | | V | IOH = −8 mA, VCC = 4.5 V, over recommended operating free-air temperature range | 4 |
| Low-level output voltage | VOL | | | 0.1 | V | IOL = 50 µA, VCC = 2 V, TA = 25°C | 4 |
| Low-level output voltage | VOL | | | 0.36 | V | IOL = 4 mA, VCC = 3 V, TA = 25°C | 4 |
| Low-level output voltage | VOL | | | 0.5 | V | IOL = 4 mA, VCC = 3 V, over recommended operating free-air temperature range | 4 |
| Input leakage current | II | -0.1 | | 0.1 | µA | VI = 5.5 V or GND, VCC = 0 V to 5.5 V, TA = 25°C | 4 |
| Input leakage current | II | -1 | | 1 | µA | VI = 5.5 V or GND, VCC = 0 V to 5.5 V, over recommended operating free-air temperature range | 4 |
| Supply current | ICC | | | 2 | µA | VI = VCC or GND, IO = 0, VCC = 5.5 V, TA = 25°C | 4 |
| Supply current | ICC | | | 20 | µA | VI = VCC or GND, IO = 0, VCC = 5.5 V, over recommended operating free-air temperature range | 4 |
| Input capacitance | Ci | | 2 | 10 | pF | VI = VCC or GND, VCC = 5 V, TA = 25°C | 4 |
| Package thermal impedance | θJA | | 86 | | °C/W | D package, see Note 2 | 3 |
## CAD (KiCad official)
- Symbol: `SN74AHC74QDRQ1`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `sn74ahc74qdrq1-etched.step` / `sn74ahc74qdrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74ahc74qdrq1.step` / `sn74ahc74qdrq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74ahc74qdrq1.pdf) (14 pp, sha256 `3d0eb1da711facb8`, retrieved 2026-10-17, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74ahc74qdrq1-datasheet.pdf)