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Contents

README

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SN74AHC541QPWRQ1

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

SN74AHC541QPWRQ1 from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Active-low output enable input that enables buffered outputs Y1-Y8 when OE1=L and OE2=L, putting outputs into high-impedance state when OE1=H.
2 A1 input Data input to buffer/driver stage A1, buffered to output Y1 when outputs enabled (OE1=L and OE2=L).
3 A2 input Data input to buffer/driver stage A2, buffered to output Y2 when outputs enabled (OE1=L and OE2=L).
4 A3 input Data input to buffer/driver stage A3, buffered to output Y3 when outputs enabled (OE1=L and OE2=L).
5 A4 input Data input to buffer/driver stage A4, buffered to output Y4 when outputs enabled (OE1=L and OE2=L).
6 A5 input Data input to buffer/driver stage A5, buffered to output Y5 when outputs enabled (OE1=L and OE2=L).
7 A6 input Data input to buffer/driver stage A6, buffered to output Y6 when outputs enabled (OE1=L and OE2=L).
8 A7 input Data input to buffer/driver stage A7, buffered to output Y7 when outputs enabled (OE1=L and OE2=L).
9 A8 input Data input to buffer/driver stage A8, buffered to output Y8 when outputs enabled (OE1=L and OE2=L).
10 GND power_in Ground connection providing logic reference voltage of 0V.
11 Y8 tri_state Buffered output Y8, non-inverted copy of A8 input when outputs enabled (OE1=L and OE2=L), high-impedance when OE1=H or OE2=H.
12 Y7 tri_state Buffered output Y7, non-inverted copy of A7 input when outputs enabled (OE1=L and OE2=L), high-impedance when OE1=H or OE2=H.
13 Y6 tri_state Buffered output Y6, non-inverted copy of A6 input when outputs enabled (OE1=L and OE2=L), high-impedance when OE1=H or OE2=H.
14 Y5 tri_state Buffered output Y5, non-inverted copy of A5 input when outputs enabled (OE1=L and OE2=L), high-impedance when OE1=H or OE2=H.
15 Y4 tri_state Buffered output Y4, non-inverted copy of A4 input when outputs enabled (OE1=L and OE2=L), high-impedance when OE1=H or OE2=H.
16 Y3 tri_state Buffered output Y3, non-inverted copy of A3 input when outputs enabled (OE1=L and OE2=L), high-impedance when OE1=H or OE2=H.
17 Y2 tri_state Buffered output Y2, non-inverted copy of A2 input when outputs enabled (OE1=L and OE2=L), high-impedance when OE1=H or OE2=H.
18 Y1 tri_state Buffered output Y1, non-inverted copy of A1 input when outputs enabled (OE1=L and OE2=L), high-impedance when OE1=H or OE2=H.
19 OE2 input Active-low output enable input that enables buffered outputs Y1-Y8 when OE2=L and OE1=L, putting outputs into high-impedance state when OE2=H.
20 VCC power_in Positive power supply pin accepting 2.0V to 5.5V per recommended operating conditions.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74AHC541QPWRQ1
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74ahc541qpwrq1-etched.step / sn74ahc541qpwrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ahc541qpwrq1.step / sn74ahc541qpwrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 2f0a0b9c531d6613, retrieved 2026-10-06, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF