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SN74AHC540PWR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74AHC540PWR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-20
SN74AHC540PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Output Enable 1; active-low control input; when high, all outputs are in high-impedance state. |
| 2 | A1 | input | A1 Input; data input for channel 1; input voltage range 0V to 5.5V. |
| 3 | A2 | input | A2 Input; data input for channel 2; input voltage range 0V to 5.5V. |
| 4 | A3 | input | A3 Input; data input for channel 3; input voltage range 0V to 5.5V. |
| 5 | A4 | input | A4 Input; data input for channel 4; input voltage range 0V to 5.5V. |
| 6 | A5 | input | A5 Input; data input for channel 5; input voltage range 0V to 5.5V. |
| 7 | A6 | input | A6 Input; data input for channel 6; input voltage range 0V to 5.5V. |
| 8 | A7 | input | A7 Input; data input for channel 7; input voltage range 0V to 5.5V. |
| 9 | A8 | input | A8 Input; data input for channel 8; input voltage range 0V to 5.5V. |
| 10 | GND | power_in | Ground; local ground reference for device. |
| 11 | Y8 | tri_state | Y8 Output; inverted data output from channel 8; high-impedance state when OE1 or OE2 is high. |
| 12 | Y7 | tri_state | Y7 Output; inverted data output from channel 7; high-impedance state when OE1 or OE2 is high. |
| 13 | Y6 | tri_state | Y6 Output; inverted data output from channel 6; high-impedance state when OE1 or OE2 is high. |
| 14 | Y5 | tri_state | Y5 Output; inverted data output from channel 5; high-impedance state when OE1 or OE2 is high. |
| 15 | Y4 | tri_state | Y4 Output; inverted data output from channel 4; high-impedance state when OE1 or OE2 is high. |
| 16 | Y3 | tri_state | Y3 Output; inverted data output from channel 3; high-impedance state when OE1 or OE2 is high. |
| 17 | Y2 | tri_state | Y2 Output; inverted data output from channel 2; high-impedance state when OE1 or OE2 is high. |
| 18 | Y1 | tri_state | Y1 Output; inverted data output from channel 1; high-impedance state when OE1 or OE2 is high. |
| 19 | OE2 | input | Output Enable 2; active-low control input; when high, all outputs are in high-impedance state. |
| 20 | VCC | power_in | Power Pin; positive supply voltage; operating range 2V to 5.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74AHC540PWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
sn74ahc540pwr-etched.step/sn74ahc540pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ahc540pwr.step/sn74ahc540pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (39 pp, sha256
70f55a30557df7c5, retrieved 2026-09-25, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).