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Contents

README

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SN74AHC367DR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOP-16

SN74AHC367DR from Texas Instruments, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-low output enable for buffers 1Y1 to 1Y4; when low the 1A inputs pass to the 1Y outputs, and when high the outputs go to high-impedance (Z).
2 1A1 input Data input for channel 1 of the first buffer section, with recommended input voltage range 0 V to 5.5 V.
3 1Y1 tri_state 3-state buffer output for channel 1 of the first section, with continuous output current limited to ±25 mA (absolute maximum).
4 1A2 input Data input for channel 2 of the first buffer section, with recommended input voltage range 0 V to 5.5 V.
5 1Y2 tri_state 3-state buffer output for channel 2 of the first section, with continuous output current limited to ±25 mA (absolute maximum).
6 1A3 input Data input for channel 3 of the first buffer section, with recommended input voltage range 0 V to 5.5 V.
7 1Y3 tri_state 3-state buffer output for channel 3 of the first section, with continuous output current limited to ±25 mA (absolute maximum).
8 GND power_in Ground reference pin for the device.
9 1Y4 tri_state 3-state buffer output for channel 4 of the first section, with continuous output current limited to ±25 mA (absolute maximum).
10 1A4 input Data input for channel 4 of the first buffer section, with recommended input voltage range 0 V to 5.5 V.
11 2Y1 tri_state 3-state buffer output for channel 1 of the second section, with continuous output current limited to ±25 mA (absolute maximum).
12 2A1 input Data input for channel 1 of the second buffer section, with recommended input voltage range 0 V to 5.5 V.
13 2Y2 tri_state 3-state buffer output for channel 2 of the second section, with continuous output current limited to ±25 mA (absolute maximum).
14 2A2 input Data input for channel 2 of the second buffer section, with recommended input voltage range 0 V to 5.5 V.
15 2OE input Active-low output enable for buffers 2Y1 and 2Y2; when low the 2A inputs pass to the 2Y outputs, and when high the outputs go to high-impedance (Z).
16 VCC power_in Supply pin; recommended operating supply range 2 V to 5.5 V, with a 0.1 µF bypass capacitor placed close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOP-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: SN74AHC367DR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74ahc367dr-etched.step / sn74ahc367dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ahc367dr.step / sn74ahc367dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (23 pp, sha256 1ed3da562e59e786, retrieved 2026-10-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF