component

SN74AHC273PWR

Public Made by Adom

by adom

Texas Instruments Logic ICs, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icssn74ahc273pwrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
sn74ahc273pwr / README.md
History Download
Ray Publish 0.1.0 6442528 13d ago

SN74AHC273PWR

Texas Instruments · Logic ICs · TSSOP-20

SN74AHC273PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLR input Direct clear input that resets the flip-flops, as described in the device overview.
2 1Q output Output Q of flip-flop 1.
3 1D input Data input to flip-flop 1, transferred to 1Q on the positive-going clock edge when setup time is met.
4 2D input Data input to flip-flop 2, transferred to 2Q on the positive-going clock edge when setup time is met.
5 2Q output Output Q of flip-flop 2.
6 3Q output Output Q of flip-flop 3.
7 3D input Data input to flip-flop 3, transferred to 3Q on the positive-going clock edge when setup time is met.
8 4D input Data input to flip-flop 4, transferred to 4Q on the positive-going clock edge when setup time is met.
9 4Q output Output Q of flip-flop 4.
10 GND power_in Ground pin.
11 CLK input Clock input; data is transferred on its positive-going edge, and the D input has no effect while CLK is at either level.
12 5Q output Output Q of flip-flop 5.
13 5D input Data input to flip-flop 5, transferred to 5Q on the positive-going clock edge when setup time is met.
14 6D input Data input to flip-flop 6, transferred to 6Q on the positive-going clock edge when setup time is met.
15 6Q output Output Q of flip-flop 6.
16 7Q output Output Q of flip-flop 7.
17 7D input Data input to flip-flop 7, transferred to 7Q on the positive-going clock edge when setup time is met.
18 8D input Data input to flip-flop 8, transferred to 8Q on the positive-going clock edge when setup time is met.
19 8Q output Output Q of flip-flop 8.
20 VCC power_in Power supply pin; the recommended supply range is 2 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 2 5.5 V 4
High-level input voltage VIH 1.5 V VCC = 2 V 4
High-level input voltage VIH 2.1 V VCC = 3 V 4
High-level input voltage VIH 3.85 V VCC = 5.5 V 4
Low-level input voltage VIL 0.5 V VCC = 2 V 4
Low-level input voltage VIL 0.9 V VCC = 3 V 4
Low-level input voltage VIL 1.65 V VCC = 5.5 V 4
Input voltage VI 0 5.5 V 4
Output voltage VO 0 V 4
High-level output current IOH -50 µA VCC = 2 V 4
High-level output current IOH -4 mA VCC = 3 V ± 0.3 V 4
High-level output current IOH -8 mA VCC = 5.5 V ± 0.5 V 4
Low-level output current IOL 50 µA VCC = 2 V 4
Low-level output current IOL 4 mA VCC = 3 V ± 0.3 V 4
Low-level output current IOL 8 mA VCC = 5.5 V ± 0.5 V 4
Input transition rise and fall time Δt/Δv 100 ns/V VCC = 3 V ± 0.3 V 4
Input transition rise and fall time Δt/Δv 20 ns/V VCC = 5.5 V ± 0.5 V 4
Operating free-air temperature TA -40 125 °C 5
Supply voltage range VCC -0.5 7 V 4
Input voltage range VI -0.5 7 V 4
Output voltage range VO -0.5 V 4
Input clamp current IIK -20 mA VI < 0 4
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC 4
Continuous output current IO -25 25 mA VO = 0 to VCC 4
Continuous current through VCC or GND -75 75 mA 4
Storage temperature range Tstg -65 150 °C 4
Junction-to-ambient thermal resistance RθJA 116.8 °C/W PW (TSSOP-20) package 5
Junction-to-case (top) thermal resistance RθJC(top) 58.5 °C/W PW (TSSOP-20) package 5
Junction-to-board thermal resistance RθJB 78.7 °C/W PW (TSSOP-20) package 5
Junction-to-top characterization parameter ψJT 12.6 °C/W PW (TSSOP-20) package 5
Junction-to-board characterization parameter ψJB 77.9 °C/W PW (TSSOP-20) package 5
High-level output voltage VOH 1.9 V IOH = -50 µA, VCC = 2 V 5
High-level output voltage VOH 2.9 V IOH = -50 µA, VCC = 3 V 5
High-level output voltage VOH 4.4 V IOH = -50 µA, VCC = 4.5 V 5
High-level output voltage VOH 2.48 V IOH = -4 mA, VCC = 3 V 5
High-level output voltage VOH 3.8 V IOH = -8 mA, VCC = 4.5 V 5
Low-level output voltage VOL 0.1 V IOL = 50 µA, VCC = 2 V 5
Low-level output voltage VOL 0.44 V IOL = 4 mA, VCC = 3 V 5
Input leakage current II -1 1 µA VI = 5.5 V or GND, VCC = 0 to 5.5 V 5
Quiescent supply current ICC 40 µA VI = VCC or GND, IO = 0, VCC = 5.5 V 5
Input capacitance Ci 2.5 10 pF VI = VCC or GND, VCC = 5 V 5

CAD (KiCad official)

  • Symbol: SN74AHC273PWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74ahc273pwr-etched.step / sn74ahc273pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ahc273pwr.step / sn74ahc273pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 5431ccf466c17a39, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF