component
SN74AHC245DBR
Public Made by Adomby adom
Texas Instruments Logic ICs, SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 13d ago |
| viewers | 13d ago |
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| page.json | 13d ago |
| README.md | 13d ago |
| sn74ahc245dbr-etched.glb | 13d ago |
| sn74ahc245dbr-etched.step | 13d ago |
| sn74ahc245dbr-hero.glb | 13d ago |
| sn74ahc245dbr-hero.overlay.json | 13d ago |
| sn74ahc245dbr.glb | 13d ago |
| sn74ahc245dbr.kicad_mod | 13d ago |
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| sn74ahc245dbr.lbr | 13d ago |
| sn74ahc245dbr.step | 13d ago |
SN74AHC245DBR
Texas Instruments · Logic ICs · SSOP-20-208mil
SN74AHC245DBR from Texas Instruments, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DIR | input | Direction control pin of the octal bus transceiver; the datasheet gives only the pin name and does not state its logic-level mapping. |
| 2 | A1 | bidirectional | Bidirectional A-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 3 | A2 | bidirectional | Bidirectional A-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 4 | A3 | bidirectional | Bidirectional A-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 5 | A4 | bidirectional | Bidirectional A-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 6 | A5 | bidirectional | Bidirectional A-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 7 | A6 | bidirectional | Bidirectional A-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 8 | A7 | bidirectional | Bidirectional A-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 9 | A8 | bidirectional | Bidirectional A-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 10 | GND | power_in | Ground pin for the device. |
| 11 | B8 | bidirectional | Bidirectional B-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 12 | B7 | bidirectional | Bidirectional B-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 13 | B6 | bidirectional | Bidirectional B-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 14 | B5 | bidirectional | Bidirectional B-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 15 | B4 | bidirectional | Bidirectional B-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 16 | B3 | bidirectional | Bidirectional B-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 17 | B2 | bidirectional | Bidirectional B-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 18 | B1 | bidirectional | Bidirectional B-bus data input/output of the octal transceiver, used in the asynchronous two-way path between the A and B buses. |
| 19 | OE | input | Output enable control pin of the device; the datasheet gives only the pin name and does not state its active level in the provided text. |
| 20 | VCC | power_in | Power supply pin; the datasheet states the device operates from 4.5 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-20-208mil |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2 | 5.5 | V | 5 | ||
| High-level input voltage | VIH | 1.5 | V | VCC = 2 V | 5 | ||
| High-level input voltage | VIH | 2.1 | V | VCC = 3 V | 5 | ||
| High-level input voltage | VIH | 3.85 | V | VCC = 5.5 V | 5 | ||
| Low-level input voltage | VIL | 0.5 | V | VCC = 2 V | 5 | ||
| Low-level input voltage | VIL | 0.9 | V | VCC = 3 V | 5 | ||
| Low-level input voltage | VIL | 1.65 | V | VCC = 5.5 V | 5 | ||
| Input voltage OE or DIR | VI | 0 | 5.5 | V | OE or DIR | 5 | |
| Output voltage A or B | VO | 0 | V | A or B; maximum printed as VCC | 5 | ||
| High-level output current | IOH | -50 | µA | VCC = 2 V | 5 | ||
| High-level output current | IOH | -4 | mA | VCC = 3.3 V ± 0.3 V | 5 | ||
| High-level output current | IOH | -8 | mA | VCC = 5 V ± 0.5 V | 5 | ||
| Low-level output current | IOL | 50 | µA | VCC = 2 V | 5 | ||
| Low-level output current | IOL | 4 | mA | VCC = 3.3 V ± 0.3 V | 5 | ||
| Low-level output current | IOL | 8 | mA | VCC = 5 V ± 0.5 V | 5 | ||
| Input transition rise or fall rate | Δt/Δv | 100 | ns/V | VCC = 3.3 V ± 0.3 V | 5 | ||
| Input transition rise or fall rate | Δt/Δv | 20 | ns/V | VCC = 5 V ± 0.5 V | 5 | ||
| Operating free-air temperature | TA | -40 | 125 | °C | SN74AHC245 | 5 | |
| Supply voltage range | VCC | -0.5 | 7 | V | 4 | ||
| Input voltage range, control inputs | VI | -0.5 | 7 | V | Control inputs | 4 | |
| Output voltage range, I/O | VO | -0.5 | V | I/O; maximum printed as VCC + 0.5 V | 4 | ||
| Input clamp current | IIK | -20 | mA | VI < 0, control inputs | 4 | ||
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC | 4 | |
| Continuous output current | IO | -25 | 25 | mA | VO = 0 to VCC | 4 | |
| Continuous current through VCC or GND | -75 | 75 | mA | 4 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| Human body model ESD | V(ESD) | 0 | 1500 | V | HBM, per ANSI/ESDA/JEDEC JS-001, all pins | 4 | |
| Charged device model ESD | V(ESD) | 0 | 2000 | V | CDM, per JEDEC JESD22-C101, all pins | 4 | |
| Junction-to-ambient thermal resistance | RθJA | 96 | °C/W | DB package, 20 pins | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 57.7 | °C/W | DB package, 20 pins | 5 | ||
| Junction-to-board thermal resistance | RθJB | 51.2 | °C/W | DB package, 20 pins | 5 | ||
| Junction-to-top characterization parameter | ψJT | 19.4 | °C/W | DB package, 20 pins | 5 | ||
| Junction-to-board characterization parameter | ψJB | 50.8 | °C/W | DB package, 20 pins | 5 | ||
| High-level output voltage | VOH | 1.9 | V | IOH = -50 µA, VCC = 2 V | 6 | ||
| High-level output voltage | VOH | 2.9 | V | IOH = -50 µA, VCC = 3 V | 6 | ||
| High-level output voltage | VOH | 4.4 | V | IOH = -50 µA, VCC = 4.5 V | 6 | ||
| High-level output voltage | VOH | 2.48 | V | IOH = -4 mA, VCC = 3 V | 6 | ||
| High-level output voltage | VOH | 3.8 | V | IOH = -8 mA, VCC = 4.5 V | 6 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 50 µA, VCC = 2 V | 6 | ||
| Low-level output voltage | VOL | 0.44 | V | IOL = 4 mA, VCC = 3 V | 6 | ||
| Input current | II | -1 | 1 | µA | A or B inputs, VI = VCC or GND, VCC = 5.5 V | 6 | |
| Off-state output current | IOZ | -2.5 | 2.5 | µA | VO = VCC or GND, VI(OE) = VIL or VIH, VCC = 5.5 V | 6 | |
| Supply current | ICC | 40 | µA | VI = VCC or GND, IO = 0, VCC = 5.5 V | 6 | ||
| Input capacitance | Ci | 10 | pF | OE or DIR, VI = VCC or GND, VCC = 5 V | 6 | ||
| Propagation delay A or B to B or A (tPLH) | tPLH | 1 | 13.5 | ns | CL = 50 pF, VCC = 3.3 V ± 0.3 V | 6 | |
| Propagation delay A or B to B or A (tPHL) | tPHL | 1 | 13.5 | ns | CL = 50 pF, VCC = 3.3 V ± 0.3 V | 6 | |
| Enable time OE to A or B (tPZH) | tPZH | 1 | 19 | ns | CL = 50 pF, VCC = 3.3 V ± 0.3 V | 6 | |
| Enable time OE to A or B (tPZL) | tPZL | 1 | 19 | ns | CL = 50 pF, VCC = 3.3 V ± 0.3 V | 6 | |
| Disable time OE to A or B (tPHZ) | tPHZ | 1 | 18 | ns | CL = 50 pF, VCC = 3.3 V ± 0.3 V | 6 | |
| Disable time OE to A or B (tPLZ) | tPLZ | 1 | 18 | ns | CL = 50 pF, VCC = 3.3 V ± 0.3 V | 6 | |
| Propagation delay A or B to B or A (tPLH) | tPLH | 1 | 8.5 | ns | CL = 50 pF, VCC = 5 V ± 0.5 V | 7 | |
| Propagation delay A or B to B or A (tPHL) | tPHL | 1 | 8.5 | ns | CL = 50 pF, VCC = 5 V ± 0.5 V | 7 | |
| Enable time OE to A or B (tPZH) | tPZH | 1 | 12 | ns | CL = 50 pF, VCC = 5 V ± 0.5 V | 7 | |
| Enable time OE to A or B (tPZL) | tPZL | 1 | 12 | ns | CL = 50 pF, VCC = 5 V ± 0.5 V | 7 | |
| Disable time OE to A or B (tPHZ) | tPHZ | 1 | 11 | ns | CL = 50 pF, VCC = 5 V ± 0.5 V | 7 | |
| Disable time OE to A or B (tPLZ) | tPLZ | 1 | 11 | ns | CL = 50 pF, VCC = 5 V ± 0.5 V | 7 |
CAD (KiCad official)
- Symbol:
SN74AHC245DBR - Footprint:
Package_SO:SSOP-20_5.3x7.2mm_P0.65mm - 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
- 3D model files:
sn74ahc245dbr-etched.step/sn74ahc245dbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ahc245dbr.step/sn74ahc245dbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
2e0da200efe77de1, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).