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SN74AHC244QPWRQ1

Public Made by Adom

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Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogicsn74ahc244qpwrq1factory-2.0.0extractor-text

Verified SN74AHC244QPWRQ1

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 20 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SN74AHC244QPWRQ1 · TSSOP-20 · 20 pins
  • ✓copper: 20 copper pads, none touching another net
  • ✓datasheet: all 20 pin names found in the 27-page datasheet
  • ✓distributor: lcsc C2863077, digikey 296-SN74AHC244QPWRQ1TR-ND, mouser 595-SN74AHC244QPWRQ1
  • ✓family: TSSOP-20_4.4x6.5mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-mn_3df24/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 20 pins = 20 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 20 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sn74ahc244qpwrq1.kicad_sym✓ sn74ahc244qpwrq1.kicad_mod✓ sn74ahc244qpwrq1.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7h ago
viewers sn74ahc244qpwrq1: viewers · Ray 7h ago
package.json Publish 0.1.0 · Ray 7h ago
page.json Set visibility: public · Ray 7h ago
README.md Publish 0.1.0 · Ray 7h ago
sn74ahc244qpwrq1-etched.glb Publish 0.1.0 · Ray 7h ago
sn74ahc244qpwrq1-etched.step sn74ahc244qpwrq1: factory component page (tier=mfr) · Ray 7h ago
sn74ahc244qpwrq1-hero.glb sn74ahc244qpwrq1: hero GLB from the etched model (keeps the MPN mark) · Ray 7h ago
sn74ahc244qpwrq1-hero.overlay.json Publish 0.1.0 · Ray 7h ago
sn74ahc244qpwrq1.glb Publish 0.1.0 · Ray 7h ago
sn74ahc244qpwrq1.kicad_mod Publish 0.1.0 · Ray 7h ago
sn74ahc244qpwrq1.kicad_sym Publish 0.1.0 · Ray 7h ago
sn74ahc244qpwrq1.lbr Publish 0.1.0 · Ray 7h ago
sn74ahc244qpwrq1.step Publish 0.1.0 · Ray 7h ago
verification.json Verified: Published by the parts factory: tier mfr, 20 pins · Ray 6h ago

SN74AHC244QPWRQ1

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

SN74AHC244QPWRQ1 from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output enable 1 for the 1A to 1Y buffers; low passes data from the 1A inputs to the 1Y outputs and high puts the outputs in the high-impedance state.
2 1A1 input 1A1 input, passed to output 1Y1 when 1OE is low; unused inputs must be held at VCC or GND.
3 2Y4 output 2Y4 3-state output, high-impedance when 2OE is high.
4 1A2 input 1A2 input, passed to output 1Y2 when 1OE is low; unused inputs must be held at VCC or GND.
5 2Y3 output 2Y3 3-state output, high-impedance when 2OE is high.
6 1A3 input 1A3 input, passed to output 1Y3 when 1OE is low; unused inputs must be held at VCC or GND.
7 2Y2 output 2Y2 3-state output, high-impedance when 2OE is high.
8 1A4 input 1A4 input, passed to output 1Y4 when 1OE is low; unused inputs must be held at VCC or GND.
9 2Y1 output 2Y1 3-state output, high-impedance when 2OE is high.
10 GND power_in Ground pin.
11 2A1 input 2A1 input, passed to output 2Y1 when 2OE is low; unused inputs must be held at VCC or GND.
12 1Y4 output 1Y4 3-state output, high-impedance when 1OE is high.
13 2A2 input 2A2 input, passed to output 2Y2 when 2OE is low; unused inputs must be held at VCC or GND.
14 1Y3 output 1Y3 3-state output, high-impedance when 1OE is high.
15 2A3 input 2A3 input, passed to output 2Y3 when 2OE is low; unused inputs must be held at VCC or GND.
16 1Y2 output 1Y2 3-state output, high-impedance when 1OE is high.
17 2A4 input 2A4 input, passed to output 2Y4 when 2OE is low; unused inputs must be held at VCC or GND.
18 1Y1 output 1Y1 3-state output, high-impedance when 1OE is high.
19 2OE input Output enable 2 for the 2A to 2Y buffers; low passes data from the 2A inputs to the 2Y outputs and high puts the outputs in the high-impedance state.
20 VCC power_in Power pin, operating range 2 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC -0.5 7 V 4
Input voltage range VI -0.5 7 V 4
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC 4
Continuous output current IO -25 25 mA VO = 0 to VCC 4
Continuous current through VCC or GND -50 50 mA 4
Storage temperature range Tstg -65 150 °C 4
Supply voltage VCC 2 5.5 V 4
High-level input voltage VIH 1.5 V VCC = 2 V 4
High-level input voltage VIH 2.1 V VCC = 3 V 4
High-level input voltage VIH 3.85 V VCC = 5.5 V 4
Low-level input voltage VIL 0.5 V VCC = 2 V 4
Low-level input voltage VIL 0.9 V VCC = 3 V 4
Low-level input voltage VIL 1.65 V VCC = 5.5 V 4
Input voltage VI 0 5.5 V 4
Output voltage VO 0 V upper limit VCC 4
High-level output current IOH -50 μA VCC = 2 V 4
High-level output current IOH -4 mA VCC = 3.3 V ± 0.3 V 4
High-level output current IOH -8 mA VCC = 5 V ± 0.5 V 4
Low-level output current IOL 50 μA VCC = 2 V 4
Low-level output current IOL 4 mA VCC = 3.3 V ± 0.3 V 4
Low-level output current IOL 8 mA VCC = 5 V ± 0.5 V 4
Input transition rise or fall rate Δt/Δv 100 ns/V VCC = 3.3 V ± 0.3 V 4
Input transition rise or fall rate Δt/Δv 20 ns/V VCC = 5 V ± 0.5 V 4
Operating free-air temperature TA -40 125 °C 4
Junction-to-ambient thermal resistance RθJA 116.8 °C/W PW package (TSSOP, 20 pins) 5
High-level output voltage VOH 1.9 2 V IOH = −50 μA; VCC = 2 V 5
High-level output voltage VOH 2.9 3 V IOH = −50 μA; VCC = 3 V 5
High-level output voltage VOH 4.4 4.5 V IOH = −50 μA; VCC = 4.5 V 5
High-level output voltage VOH 2.48 V IOH = −4 mA; VCC = 3 V 5
High-level output voltage VOH 3.8 V IOH = −8 mA; VCC = 4.5 V 5
Low-level output voltage VOL 0.1 V IOL = 50 μA; VCC = 2 V 5
Low-level output voltage VOL 0.5 V IOL = 4 mA; VCC = 3 V 5
Input leakage current II -1 0.1 1 μA VI = 5.5 V or GND; 0 V to 5.5 V 5
High-impedance output leakage current IOZ -2.5 0.25 2.5 μA VO = VCC or GND, VI(OE) = VIL or VIH; VCC 5.5 V 5
Quiescent supply current ICC 4 40 μA VI = VCC or GND, IO = 0; VCC 5.5 V 5
Input capacitance Ci 2 10 pF VI = VCC or GND; VCC 5 V 5
Propagation delay time, low-to-high (A to Y) tPLH 1 10 ns CL = 15 pF; VCC = 3.3 V ± 0.3 V 5
Propagation delay time, high-to-low (A to Y) tPHL 1 10 ns CL = 15 pF; VCC = 3.3 V ± 0.3 V 5
Enable time, high (OE to Y) tPZH 1 12.5 ns CL = 15 pF; VCC = 3.3 V ± 0.3 V 5
Enable time, low (OE to Y) tPZL 1 12.5 ns CL = 15 pF; VCC = 3.3 V ± 0.3 V 5
Disable time, high (OE to Y) tPHZ 1 11 ns CL = 15 pF; VCC = 3.3 V ± 0.3 V 5
Disable time, low (OE to Y) tPLZ 1 11 ns CL = 15 pF; VCC = 3.3 V ± 0.3 V 5
Propagation delay time, low-to-high (A to Y) tPLH 1 13.5 ns CL = 50 pF; VCC = 3.3 V ± 0.3 V 5
Propagation delay time, high-to-low (A to Y) tPHL 1 13.5 ns CL = 50 pF; VCC = 3.3 V ± 0.3 V 5
Enable time, high (OE to Y) tPZH 1 16 ns CL = 50 pF; VCC = 3.3 V ± 0.3 V 5
Disable time, high (OE to Y) tPHZ 1 16 ns CL = 50 pF; VCC = 3.3 V ± 0.3 V 5
Propagation delay time, low-to-high (A to Y) tPLH 1 6.5 ns CL = 15 pF; VCC = 5 V ± 0.5 V 6
Propagation delay time, high-to-low (A to Y) tPHL 1 6.5 ns CL = 15 pF; VCC = 5 V ± 0.5 V 6
Enable time, high (OE to Y) tPZH 1 8.5 ns CL = 15 pF; VCC = 5 V ± 0.5 V 6
Enable time, low (OE to Y) tPZL 1 8.5 ns CL = 15 pF; VCC = 5 V ± 0.5 V 6
Disable time, high (OE to Y) tPHZ 1 8.5 ns CL = 15 pF; VCC = 5 V ± 0.5 V 6
Disable time, low (OE to Y) tPLZ 1 8.5 ns CL = 15 pF; VCC = 5 V ± 0.5 V 6
Propagation delay time, low-to-high (A to Y) tPLH 1 8.5 ns CL = 50 pF; VCC = 5 V ± 0.5 V 6
Propagation delay time, high-to-low (A to Y) tPHL 1 8.5 ns CL = 50 pF; VCC = 5 V ± 0.5 V 6
Enable time, high (OE to Y) tPZH 1 10.5 ns CL = 50 pF; VCC = 5 V ± 0.5 V 6
Enable time, low (OE to Y) tPZL 1 10.5 ns CL = 50 pF; VCC = 5 V ± 0.5 V 6

CAD (KiCad official)

  • Symbol: SN74AHC244QPWRQ1
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74ahc244qpwrq1-etched.step / sn74ahc244qpwrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ahc244qpwrq1.step / sn74ahc244qpwrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 a701b839dec452b0, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF