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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	sn74ahc1g126dckr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	2d ago
viewers	sn74ahc1g126dckr: viewers · Ray	1mo ago
package.json	Publish 0.2.0 · Ray	1mo ago
page.json	Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray	10d ago
README.md	sn74ahc1g126dckr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray	14d ago
sn74ahc1g126dckr-etched.fit.json	sn74ahc1g126dckr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	2d ago
sn74ahc1g126dckr-etched.glb	sn74ahc1g126dckr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	2d ago
sn74ahc1g126dckr-etched.step	sn74ahc1g126dckr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	2d ago
sn74ahc1g126dckr.glb	Publish 0.1.0 · Ray	1mo ago
sn74ahc1g126dckr.kicad_mod	Publish 0.1.0 · Ray	1mo ago
sn74ahc1g126dckr.kicad_sym	Publish 0.1.0 · Ray	1mo ago
sn74ahc1g126dckr.lbr	Publish 0.1.0 · Ray	1mo ago
sn74ahc1g126dckr.step	Publish 0.1.0 · Ray	1mo ago

SN74AHC1G126DCKR

Texas Instruments · Buffer/Driver/Transceiver · SC-70-5

SN74AHC1G126DCKR from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OE	input	Active-high output enable. When OE = high, the buffer passes A to Y; when OE = low, Y is placed in a high-impedance (Hi-Z) state. CMOS input, V_IH ≥ 3.85 V at V_CC = 5.5 V.
2	A	input	Data input to the buffer. Logic level at A is driven to Y output when OE is high. CMOS input; unused inputs must be tied to V_CC or GND per TI floating-input guidance.
3	GND	power_in	Ground reference (0 V) for the device.
4	Y	tri_state	3-state buffer output. Drives the logic level of A when OE is high; enters high-impedance when OE is low. Rated ±8 mA drive at V_CC = 5 V (±4 mA at 3.3 V).
5	VCC	power_in	Positive supply voltage, 2 V to 5.5 V recommended operating range. Absolute maximum 7 V. Typical I_CC ≤ 10 µA.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SC-70-5
Category	Logic
Pins	5

Ordering variants

Same part, different packaging or reel option.

SN74AHC1G126DCKR
SN74AHC1G126DCKRDCKT
SN74AHC1G126DCKRDBVR
SN74AHC1G126DCKRDBVT
SN74AHC1G126DCKRDRLR

CAD (KiCad official)

Symbol: SN74AHC1G126DCKR
Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
3D model: SC-70-5 (KiCad packages3D, STEP)
3D model files: sn74ahc1g126dckr-etched.step / sn74ahc1g126dckr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ahc1g126dckr.step / sn74ahc1g126dckr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sn74ahc1g126dckr.step`	87 KB	You want the bare part, or you mark your own boards.
`sn74ahc1g126dckr-etched.step`	2.6 MB	You want the part with `SN74AHC1G126DCKR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 659 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (27 pp, sha256 6824188e88dcff51, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF