main
Ray sn74ahc1g00dckr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 27315e0 1d ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "sn74ahc1g00dckr",
  "title": "SN74AHC1G00DCKR",
  "brief": "Texas Instruments Gates, SC-70-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "sn74ahc1g00dckr"
  ],
  "component": {
    "mpn": "SN74AHC1G00DCKR",
    "manufacturer": "Texas Instruments",
    "package": "SC-70-5",
    "pin_count": 5,
    "category": "Logic",
    "subcategory": "Gates",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74ahc1g00.pdf",
    "parts": {
      "symbol": "sn74ahc1g00dckr.kicad_sym",
      "footprint": "sn74ahc1g00dckr.kicad_mod",
      "model_3d": "sn74ahc1g00dckr-etched.glb",
      "model_3d_plain": "sn74ahc1g00dckr.glb",
      "model_3d_step": "sn74ahc1g00dckr-etched.step",
      "model_3d_step_plain": "sn74ahc1g00dckr.step",
      "lbr": "sn74ahc1g00dckr.lbr"
    },
    "distributor_links": {
      "digikey": "296-8741-2-ND",
      "mouser": "595-SN74AHC1G00DCKR",
      "lcsc": "C478470"
    },
    "pins": [
      {
        "number": "1",
        "name": "A",
        "type": "input",
        "description": "NAND gate logic input A. CMOS Schmitt-trigger input, overvoltage tolerant to 5.5 V regardless of VCC. Unused inputs must be tied to VCC or GND."
      },
      {
        "number": "2",
        "name": "B",
        "type": "input",
        "description": "NAND gate logic input B. CMOS Schmitt-trigger input, overvoltage tolerant to 5.5 V regardless of VCC. Unused inputs must be tied to VCC or GND."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V) for the device."
      },
      {
        "number": "4",
        "name": "Y",
        "type": "output",
        "description": "NAND gate output, Y = NOT(A AND B). Totem-pole CMOS output rated for +/-8 mA drive at VCC = 5 V (+/-4 mA at 3.3 V). Load current must not exceed 25 mA per output and 50 mA total for the part; do not pull above VCC."
      },
      {
        "number": "5",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply, 2 V to 5.5 V recommended (absolute max 7 V). Bypass locally with a 0.1 uF ceramic capacitor to GND."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74ahc1g00.pdf",
        "pages": 28,
        "sha256": "a36352df5fcce3eb",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 5,
        "described": 5,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -0.8375,
        -0.65
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOT-353_SC-70-5@sha256:869e17094994ff78",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "74AHC1G00",
      "logic_family": "74AHC",
      "function_code": "1G00",
      "function_class": "Gate",
      "function_name": "1-gate variant of Quad 2-Input NAND Gate (00)",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "sn74ahc1g00dckr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.1,
          2.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "2860de5b7b085919ff6e952148353f928798588d9f544dc69430545aff2ba908",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74ahc1g00dckr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.1,
          2.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d1d78ac647b6e651eeea1fb786354a1629b5a19f6e14bbc2554238781eb9b019",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "SC-70-5",
      "Category": "Logic",
      "Pins": "5"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "sn74ahc1g00dckr"
  ],
  "discovery_pitch": "SN74AHC1G00DCKR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74ahc1g00dckr.kicad_sym",
    "sn74ahc1g00dckr.kicad_mod",
    "sn74ahc1g00dckr.glb",
    "sn74ahc1g00dckr.step",
    "sn74ahc1g00dckr-etched.step",
    "sn74ahc1g00dckr.lbr",
    "docs/hero.png",
    "docs/sn74ahc1g00dckr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "SN74AHC1G00DCKR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHC1G00DCKRDCKT",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHC1G00DCKRDBVR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHC1G00DCKRDBVT",
      "kind": "packaging"
    },
    {
      "mpn": "SN74AHC1G00DCKRDRLR",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T06:37:37.091Z"
}