component

SN74AHC1G00DBVRQ1

Public Made by Adom

by adom

Texas Instruments Logic Gates, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogicsn74ahc1g00dbvrq1factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

SN74AHC1G00DBVRQ1

Texas Instruments · Logic Gates · SOT-23-5

SN74AHC1G00DBVRQ1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Input A of the 2-input positive-NAND gate; unused inputs must be held at VCC or GND, with input voltage range 0 to 5.5 V.
2 B input Input B of the 2-input positive-NAND gate; unused inputs must be held at VCC or GND, with input voltage range 0 to 5.5 V.
3 GND power_in Ground pin.
4 Y output Output Y of the NAND gate, with ±8 mA output drive at 5 V and output voltage range 0 to VCC.
5 VCC power_in Power supply pin, operating range 2 V to 5.5 V, with a 0.1 µF bypass capacitor recommended close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Logic
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC -0.5 7 V 4
Input voltage range VI -0.5 7 V 4
Output voltage range VO -0.5 5.5 V max printed as VCC + 0.5 4
Input clamp current IIK -20 mA VI < 0 4
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC 4
Continuous output current IO -25 25 mA VO = 0 to VCC 4
Continuous current through VCC or GND -50 50 mA 4
Storage temperature range Tstg -65 150 °C 4
ESD HBM V(ESD) -2000 2000 V Human body model, AEC Q100-002 4
ESD CDM V(ESD) -1000 1000 V Charged device model, AEC Q100-011 4
Supply voltage VCC 2 5.5 V 4
High-level input voltage VIH 1.5 V VCC = 2 V 4
High-level input voltage VIH 2.1 V VCC = 3 V 4
High-level input voltage VIH 3.85 V VCC = 5.5 V 4
Low-level input voltage VIL 0.5 V VCC = 2 V 4
Low-level input voltage VIL 0.9 V VCC = 3 V 4
Low-level input voltage VIL 1.65 V VCC = 5.5 V 4
Input voltage VI 0 5.5 V 4
Output voltage VO 0 5.5 V max printed as VCC 4
High-level output current IOH -50 μA VCC = 2 V 4
High-level output current IOH -4 mA VCC = 3.3 V ± 0.3 V 4
High-level output current IOH -8 mA VCC = 5 V ± 0.5 V 4
Low-level output current IOL 50 μA VCC = 2 V 4
Low-level output current IOL 4 mA VCC = 3.3 V ± 0.3 V 4
Low-level output current IOL 8 mA VCC = 5 V ± 0.5 V 4
Input transition rise or fall rate ∆t/∆v 100 ns/V VCC = 3.3 V ± 0.3 V 4
Input transition rise or fall rate ∆t/∆v 20 ns/V VCC = 5 V ± 0.5 V 4
Operating free-air temperature TA -40 125 °C 4
Junction-to-ambient thermal resistance (DBV) RθJA 278 °C/W DBV (SOT-23), 5 pins 5
High-level output voltage VOH 1.9 2 V IOH = −50 μA, VCC = 2 V; min -40 to 125°C 1.9 5
High-level output voltage VOH 2.9 3 V IOH = −50 μA, VCC = 3 V 5
High-level output voltage VOH 4.4 4.5 V IOH = −50 μA, VCC = 4.5 V 5
High-level output voltage VOH 2.48 V IOH = −4 mA, VCC = 3 V, -40 to 125°C 5
High-level output voltage VOH 3.8 V IOH = −8 mA, VCC = 4.5 V, -40 to 125°C 5
Low-level output voltage VOL 0.1 V IOL = 50 μA, VCC = 2 V 5
Low-level output voltage VOL 0.5 V IOL = 4 mA, VCC = 3 V, -40 to 125°C 5
Input current II -1 1 μA VI = 5.5 V or GND, VCC = 0 V to 5.5 V, -40 to 125°C 5
Supply current ICC 1 10 μA VI = VCC or GND, IO = 0, VCC = 5.5 V 5
Input capacitance Ci 2 10 pF VI = VCC or GND, VCC = 5 V 5
Propagation delay A or B to Y tPLH/tPHL 1 5.5 11.5 ns VCC = 3.3 V ± 0.3 V, CL = 15 pF, -40 to 125°C 5
Propagation delay A or B to Y tPLH/tPHL 1 8 15 ns VCC = 3.3 V ± 0.3 V, CL = 50 pF, -40 to 125°C 5
Propagation delay A or B to Y tPLH/tPHL 1 3.7 8.5 ns VCC = 5 V ± 0.5 V, CL = 15 pF, -40 to 125°C 6
Propagation delay A or B to Y tPLH/tPHL 1 5.2 10.5 ns VCC = 5 V ± 0.5 V, CL = 50 pF, -40 to 125°C 6
Power dissipation capacitance Cpd 9.5 pF No load, f = 1 MHz, VCC = 5 V, TA = 25°C 6

CAD (KiCad official)

  • Symbol: SN74AHC1G00DBVRQ1
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: sn74ahc1g00dbvrq1-etched.step / sn74ahc1g00dbvrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ahc1g00dbvrq1.step / sn74ahc1g00dbvrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 9e0940dae278f0ba, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF