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SN74AHC125QPWR

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Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogicsn74ahc125qpwrfactory-2.0.0extractor-text

Verified SN74AHC125QPWR

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 14 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SN74AHC125QPWR · TSSOP-14 · 14 pins
  • ✓copper: 14 copper pads, none touching another net
  • ✓datasheet: all 14 pin names found in the 17-page datasheet
  • ✓distributor: lcsc C2675790, digikey 296-38217-2-ND, mouser 595-SN74AHC125QPWR
  • ✓family: TSSOP-14_4.4x5mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-b32ergst/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 14 pins = 14 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 14 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sn74ahc125qpwr.kicad_sym✓ sn74ahc125qpwr.kicad_mod✓ sn74ahc125qpwr.step
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Ray Publish 0.1.0 88380cf 6h ago

SN74AHC125QPWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-14

SN74AHC125QPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-low output enable for buffer 1; when OE is high, output 1Y is set to high impedance.
2 1A input Data input of buffer 1, passed to output 1Y when 1OE is low.
3 1Y output Three-state output of buffer 1, which is high impedance when 1OE is high.
4 2OE input Active-low output enable for buffer 2; when OE is high, output 2Y is set to high impedance.
5 2A input Data input of buffer 2, passed to output 2Y when 2OE is low.
6 2Y output Three-state output of buffer 2, which is high impedance when 2OE is high.
7 GND power_in Ground reference for the device.
8 3OE input Active-low output enable for buffer 3; when OE is high, output 3Y is set to high impedance.
9 3A input Data input of buffer 3, passed to output 3Y when 3OE is low.
10 3Y output Three-state output of buffer 3, which is high impedance when 3OE is high.
11 4Y output Three-state output of buffer 4, which is high impedance when 4OE is high.
12 4A input Data input of buffer 4, passed to output 4Y when 4OE is low.
13 4OE input Active-low output enable for buffer 4; when OE is high, output 4Y is set to high impedance.
14 VCC power_in Supply voltage, 2 V to 5.5 V per the recommended operating conditions.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC -0.5 7 V 4
Input voltage range VI -0.5 7 V 4
Output voltage range VO -0.5 V Max printed as VCC + 0.5 V 4
Input clamp current IIK -20 mA VI < 0 4
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC 4
Continuous output current IO -25 25 mA VO = 0 to VCC 4
Continuous current through VCC or GND -50 50 mA 4
Storage temperature range Tstg -65 150 °C 4
Supply voltage VCC 2 5.5 V 4
High-level input voltage VIH 1.5 V VCC = 2 V 4
High-level input voltage VIH 2.1 V VCC = 3 V 4
High-level input voltage VIH 3.85 V VCC = 5.5 V 4
Low-level input voltage VIL 0.5 V VCC = 2 V 4
Low-level input voltage VIL 0.9 V VCC = 3 V 4
Low-level input voltage VIL 1.65 V VCC = 5.5 V 4
Input voltage VI 0 5.5 V 4
Output voltage VO 0 V Max printed as VCC 4
High-level output current IOH -50 μΑ VCC = 2 V 4
High-level output current IOH -4 mA VCC = 3.3 V ± 0.3 V 4
High-level output current IOH -8 mA VCC = 5 V ± 0.5 V 4
Low-level output current IOL 50 μΑ VCC = 2 V 4
Low-level output current IOL 4 mA VCC = 3.3 V ± 0.3 V 4
Low-level output current IOL 8 mA VCC = 5 V ± 0.5 V 4
Input transition rise or fall rate Δt/Δv 100 ns/V VCC = 3.3 V ± 0.3 V 4
Input transition rise or fall rate Δt/Δv 20 ns/V VCC = 5 V ± 0.5 V 4
Operating free-air temperature TA -40 125 °C 4
Junction-to-ambient thermal resistance (PW TSSOP) RθJA 113 °C/W PW (TSSOP) 14 pins 4
High-level output voltage VOH 1.9 2 V IOH = −50 μA, VCC = 2 V 5
High-level output voltage VOH 2.9 3 V IOH = −50 μA, VCC = 3 V 5
High-level output voltage VOH 4.4 4.5 V IOH = −50 μA, VCC = 4.5 V 5
High-level output voltage VOH 2.48 V IOH = −4 mA, VCC = 3 V 5
High-level output voltage VOH 3.8 V IOH = −8 mA, VCC = 4.5 V 5
Low-level output voltage VOL 0.1 0.1 V IOL = 50 μA, VCC = 2 V 5
Low-level output voltage VOL 0.36 0.5 V IOL = 4 mA, VCC = 3 V 5
Input leakage current II -1 0.1 1 μA VI = 5.5 V or GND, 0 V to 5.5 V 5
Off-state output current IOZ -2.5 0.25 2.5 μA VO = VCC or GND, VCC = 5.5 V 5
Supply current ICC 4 40 μA VI = VCC or GND, IO = 0, VCC = 5.5 V 5
Input capacitance Ci 4 10 pF VI = VCC or GND, VCC = 5 V 5
Propagation delay tPLH A to Y, 3.3 V tPLH 1 8 9.5 ns VCC = 3.3 V ± 0.3 V, CL = 15 pF 5
Output enable delay tPZH OE to Y, 3.3 V tPZH 1 8 9.5 ns VCC = 3.3 V ± 0.3 V, CL = 15 pF 5
Output disable delay tPHZ OE to Y, 3.3 V tPHZ 1 9.7 11.5 ns VCC = 3.3 V ± 0.3 V, CL = 15 pF 5
Propagation delay tPLH A to Y, 3.3 V tPLH 1 11.5 13 ns VCC = 3.3 V ± 0.3 V, CL = 50 pF 5
Output disable delay tPHZ OE to Y, 3.3 V tPHZ 1 13.2 15 ns VCC = 3.3 V ± 0.3 V, CL = 50 pF 5
Propagation delay tPLH A to Y, 5 V tPLH 1 5.5 6.5 ns VCC = 5 V ± 0.5 V, CL = 15 pF 5
Output disable delay tPHZ OE to Y, 5 V tPHZ 1 6.8 8 ns VCC = 5 V ± 0.5 V, CL = 15 pF 6
Propagation delay tPLH A to Y, 5 V tPLH 1 7.5 8.5 ns VCC = 5 V ± 0.5 V, CL = 50 pF 6
Output disable delay tPHZ OE to Y, 5 V tPHZ 1 8.8 10 ns VCC = 5 V ± 0.5 V, CL = 50 pF 6
Quiet output maximum dynamic VOL VOL(P) 0.8 V VCC = 5 V, CL = 50 pF, TA = 25°C 6
Quiet output minimum dynamic VOL VOL(V) -0.8 V VCC = 5 V, CL = 50 pF, TA = 25°C 6
Quiet output minimum dynamic VOH VOH(V) 4.4 V VCC = 5 V, CL = 50 pF, TA = 25°C 6
High-level dynamic input voltage VIH(D) 3.5 V VCC = 5 V, CL = 50 pF, TA = 25°C 6
Low-level dynamic input voltage VIL(D) 1.5 V VCC = 5 V, CL = 50 pF, TA = 25°C 6
Power dissipation capacitance Cpd 14 pF VCC = 5 V, TA = 25°C, no load, f = 1 MHz 6

CAD (KiCad official)

  • Symbol: SN74AHC125QPWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ahc125qpwr-etched.step / sn74ahc125qpwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ahc125qpwr.step / sn74ahc125qpwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (17 pp, sha256 ff00b2e5f9f26ab1, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF