component
SN74AHC04N
Public Made by Adomby adom
Texas Instruments Inverters, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 8d ago |
| viewers | 8d ago |
| package.json | 8d ago |
| page.json | 8d ago |
| README.md | 8d ago |
| sn74ahc04n-etched.glb | 8d ago |
| sn74ahc04n-etched.step | 8d ago |
| sn74ahc04n-hero.glb | 8d ago |
| sn74ahc04n-hero.overlay.json | 8d ago |
| sn74ahc04n.glb | 8d ago |
| sn74ahc04n.kicad_mod | 8d ago |
| sn74ahc04n.kicad_sym | 8d ago |
| sn74ahc04n.lbr | 8d ago |
| sn74ahc04n.step | 8d ago |
SN74AHC04N
Texas Instruments · Inverters · PDIP-14
SN74AHC04N from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Inverter 1 input; unused inputs must be held at VCC or GND, and VI is 0 to 5.5 V. |
| 2 | 1Y | output | Inverter 1 output (Y = A inverted); IOH/IOL of ±8 mA at VCC = 5 V ± 0.5 V. |
| 3 | 2A | input | Inverter 2 input; unused inputs must be held at VCC or GND, and VI is 0 to 5.5 V. |
| 4 | 2Y | output | Inverter 2 output (Y = A inverted); IOH/IOL of ±8 mA at VCC = 5 V ± 0.5 V. |
| 5 | 3A | input | Inverter 3 input; unused inputs must be held at VCC or GND, and VI is 0 to 5.5 V. |
| 6 | 3Y | output | Inverter 3 output (Y = A inverted); IOH/IOL of ±8 mA at VCC = 5 V ± 0.5 V. |
| 7 | GND | power_in | Ground pin. |
| 8 | 4Y | output | Inverter 4 output (Y = A inverted); IOH/IOL of ±8 mA at VCC = 5 V ± 0.5 V. |
| 9 | 4A | input | Inverter 4 input; unused inputs must be held at VCC or GND, and VI is 0 to 5.5 V. |
| 10 | 5Y | output | Inverter 5 output (Y = A inverted); IOH/IOL of ±8 mA at VCC = 5 V ± 0.5 V. |
| 11 | 5A | input | Inverter 5 input; unused inputs must be held at VCC or GND, and VI is 0 to 5.5 V. |
| 12 | 6Y | output | Inverter 6 output (Y = A inverted); IOH/IOL of ±8 mA at VCC = 5 V ± 0.5 V. |
| 13 | 6A | input | Inverter 6 input; unused inputs must be held at VCC or GND, and VI is 0 to 5.5 V. |
| 14 | VCC | power_in | Positive supply, recommended operating range 2 V to 5.5 V (absolute maximum 7 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-level output voltage | VOH | 1.9 | 2 | V | IOH = -50 µA, VCC = 2 V | 3 | |
| High-level output voltage | VOH | 2.9 | 3 | V | IOH = -50 µA, VCC = 3 V | 3 | |
| High-level output voltage | VOH | 4.4 | 4.5 | V | IOH = -50 µA, VCC = 4.5 V | 3 | |
| High-level output voltage | VOH | 2.48 | V | IOH = -4 mA, VCC = 3 V | 3 | ||
| High-level output voltage | VOH | 3.8 | V | IOH = -8 mA, VCC = 4.5 V | 3 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 50 µA, VCC = 2 V | 3 | ||
| Low-level output voltage | VOL | 0.5 | V | IOL = 4 mA, VCC = 3 V | 3 | ||
| Input current | II | -1 | 1 | µA | VI = 5.5 V or GND, VCC = 0 V to 5.5 V | 3 | |
| Supply current | ICC | 20 | µA | VI = VCC or GND, IO = 0, VCC = 5.5 V | 3 | ||
| Input capacitance | Ci | 5 | 10 | pF | VI = VCC or GND, VCC = 5 V | 3 | |
| Propagation delay A to Y (low-to-high) | tPLH | 1 | 5 | 10.5 | ns | VCC = 3.3 V ± 0.3 V, CL = 15 pF | 3 |
| Propagation delay A to Y (high-to-low) | tPHL | 1 | 5 | 10.5 | ns | VCC = 3.3 V ± 0.3 V, CL = 15 pF | 3 |
| Propagation delay A to Y (low-to-high) | tPLH | 1 | 7.5 | 13 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF | 3 |
| Propagation delay A to Y (high-to-low) | tPHL | 1 | 7.5 | 13 | ns | VCC = 3.3 V ± 0.3 V, CL = 50 pF | 3 |
| Propagation delay A to Y (low-to-high) | tPLH | 1 | 3.8 | 6.5 | ns | VCC = 5 V ± 0.5 V, CL = 15 pF | 3 |
| Propagation delay A to Y (high-to-low) | tPHL | 1 | 3.8 | 6.5 | ns | VCC = 5 V ± 0.5 V, CL = 15 pF | 3 |
| Propagation delay A to Y (low-to-high) | tPLH | 1 | 5.3 | 8.5 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF | 3 |
| Propagation delay A to Y (high-to-low) | tPHL | 1 | 5.3 | 8.5 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF | 3 |
| Supply voltage | VCC | 2 | 5.5 | V | 2 | ||
| High-level input voltage | VIH | 1.5 | V | VCC = 2 V | 2 | ||
| High-level input voltage | VIH | 2.1 | V | VCC = 3 V | 2 | ||
| High-level input voltage | VIH | 3.85 | V | VCC = 5.5 V | 2 | ||
| Low-level input voltage | VIL | 0.5 | V | VCC = 2 V | 2 | ||
| Low-level input voltage | VIL | 0.9 | V | VCC = 3 V | 2 | ||
| Low-level input voltage | VIL | 1.65 | V | VCC = 5.5 V | 2 | ||
| Input voltage | VI | 0 | 5.5 | V | 2 | ||
| Output voltage | VO | 0 | V | max = VCC | 2 | ||
| High-level output current | IOH | -4 | mA | VCC = 3.3 V ± 0.3 V | 2 | ||
| High-level output current | IOH | -8 | mA | VCC = 5 V ± 0.5 V | 2 | ||
| Low-level output current | IOL | 4 | mA | VCC = 3.3 V ± 0.3 V | 2 | ||
| Low-level output current | IOL | 8 | mA | VCC = 5 V ± 0.5 V | 2 | ||
| Input transition rise or fall rate | Δt/Δv | 100 | ns/V | VCC = 3.3 V ± 0.3 V | 2 | ||
| Input transition rise or fall rate | Δt/Δv | 20 | ns/V | VCC = 5 V ± 0.5 V | 2 | ||
| Operating free-air temperature | TA | -40 | 125 | °C | 2 | ||
| Supply voltage range | VCC | -0.5 | 7 | V | 2 | ||
| Input voltage range | VI | -0.5 | 7 | V | 2 | ||
| Output voltage range | VO | -0.5 | V | max = VCC + 0.5 V | 2 | ||
| Input clamp current | IIK | -20 | mA | VI < 0 | 2 | ||
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC | 2 | |
| Continuous output current | IO | -25 | 25 | mA | VO = 0 to VCC | 2 | |
| Continuous current through VCC or GND | -50 | 50 | mA | 2 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 2 | ||
| Package thermal impedance, N package | θJA | 80 | °C/W | N package, JESD 51-7 | 2 | ||
| Power dissipation capacitance | Cpd | 12 | pF | No load, f = 1 MHz, VCC = 5 V, TA = 25°C | 4 |
CAD (KiCad official)
- Symbol:
SN74AHC04N - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74ahc04n-etched.step/sn74ahc04n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ahc04n.step/sn74ahc04n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
ab2b166a135e0659, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).