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SN74AHC00QPWRQ1

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Texas Instruments Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs sn74ahc00qpwrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5h ago
viewers sn74ahc00qpwrq1: viewers · Ray 3d ago
package.json Publish 0.1.0 · Ray 3d ago
page.json sn74ahc00qpwrq1: annotated 3D hero (adom-hero 1.4) · Ray 5h ago
README.md sn74ahc00qpwrq1: annotated 3D hero (adom-hero 1.4) · Ray 5h ago
sn74ahc00qpwrq1-etched.fit.json sn74ahc00qpwrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5h ago
sn74ahc00qpwrq1-etched.glb sn74ahc00qpwrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5h ago
sn74ahc00qpwrq1-etched.step sn74ahc00qpwrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5h ago
sn74ahc00qpwrq1-hero.glb sn74ahc00qpwrq1: annotated 3D hero (adom-hero 1.4) · Ray 5h ago
sn74ahc00qpwrq1-hero.overlay.json sn74ahc00qpwrq1: annotated 3D hero (adom-hero 1.4) · Ray 5h ago
sn74ahc00qpwrq1.glb Publish 0.1.0 · Ray 3d ago
sn74ahc00qpwrq1.kicad_mod Publish 0.1.0 · Ray 3d ago
sn74ahc00qpwrq1.kicad_sym Publish 0.1.0 · Ray 3d ago
sn74ahc00qpwrq1.lbr Publish 0.1.0 · Ray 3d ago
sn74ahc00qpwrq1.step Publish 0.1.0 · Ray 3d ago

SN74AHC00QPWRQ1

Texas Instruments · Logic Gates · TSSOP-14

SN74AHC00QPWRQ1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input A of NAND gate 1
2 1B input Input B of NAND gate 1
3 1Y output Output Y of NAND gate 1
4 2A input Input A of NAND gate 2
5 2B input Input B of NAND gate 2
6 2Y output Output Y of NAND gate 2
7 GND power_in Ground reference
8 3Y output Output Y of NAND gate 3
9 3A input Input A of NAND gate 3
10 3B input Input B of NAND gate 3
11 4Y output Output Y of NAND gate 4
12 4A input Input A of NAND gate 4
13 4B input Input B of NAND gate 4
14 VCC power_in Positive supply voltage, recommended range 2 V to 5.5 V

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74AHC00QPWRQ1
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • Annotated 3D hero: sn74ahc00qpwrq1-hero.glb (dashed pad outlines, silkscreen with pin 1, signal names; the adom-hero standard) is what the viewer shows. Downloads and EDA use the clean model, sn74ahc00qpwrq1-etched.glb.
  • 3D model files: sn74ahc00qpwrq1-etched.step / sn74ahc00qpwrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ahc00qpwrq1.step / sn74ahc00qpwrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 e37300eb9635a322, retrieved 2026-10-02, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF