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SN74ACT373MDWREP

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Texas Instruments Latches, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74ACT373MDWREP

Texas Instruments · Latches · SOIC-20-300mil

SN74ACT373MDWREP from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Active-low buffered output enable; when high, all eight Q outputs go to high impedance, and it should be tied to VCC through a pullup resistor to keep the outputs high-Z during power up and power down.
2 1Q tri_state Three-state output of latch 1, driving highly capacitive or low-impedance loads with IOH of -24 mA and IOL of 24 mA maximum.
3 1D input Data input to latch 1, TTL-voltage compatible and accepting voltages up to 5.5 V, sampled while LE is high and held on the falling edge of LE.
4 2D input Data input to latch 2, TTL-voltage compatible and accepting voltages up to 5.5 V, sampled while LE is high and held on the falling edge of LE.
5 2Q tri_state Three-state output of latch 2, driving highly capacitive or low-impedance loads with IOH of -24 mA and IOL of 24 mA maximum.
6 3Q tri_state Three-state output of latch 3, driving highly capacitive or low-impedance loads with IOH of -24 mA and IOL of 24 mA maximum.
7 3D input Data input to latch 3, TTL-voltage compatible and accepting voltages up to 5.5 V, sampled while LE is high and held on the falling edge of LE.
8 4D input Data input to latch 4, TTL-voltage compatible and accepting voltages up to 5.5 V, sampled while LE is high and held on the falling edge of LE.
9 4Q tri_state Three-state output of latch 4, driving highly capacitive or low-impedance loads with IOH of -24 mA and IOL of 24 mA maximum.
10 GND power_in Device ground reference for the 4.5 V to 5.5 V supply.
11 LE input Latch enable; when high the Q outputs follow D, and when taken low the Q outputs latch the data present at D (minimum LE high pulse width 7 ns).
12 5Q tri_state Three-state output of latch 5, driving highly capacitive or low-impedance loads with IOH of -24 mA and IOL of 24 mA maximum.
13 5D input Data input to latch 5, TTL-voltage compatible and accepting voltages up to 5.5 V, sampled while LE is high and held on the falling edge of LE.
14 6D input Data input to latch 6, TTL-voltage compatible and accepting voltages up to 5.5 V, sampled while LE is high and held on the falling edge of LE.
15 6Q tri_state Three-state output of latch 6, driving highly capacitive or low-impedance loads with IOH of -24 mA and IOL of 24 mA maximum.
16 7Q tri_state Three-state output of latch 7, driving highly capacitive or low-impedance loads with IOH of -24 mA and IOL of 24 mA maximum.
17 7D input Data input to latch 7, TTL-voltage compatible and accepting voltages up to 5.5 V, sampled while LE is high and held on the falling edge of LE.
18 8D input Data input to latch 8, TTL-voltage compatible and accepting voltages up to 5.5 V, sampled while LE is high and held on the falling edge of LE.
19 8Q tri_state Three-state output of latch 8, driving highly capacitive or low-impedance loads with IOH of -24 mA and IOL of 24 mA maximum.
20 VCC power_in Supply voltage, 4.5 V to 5.5 V (recommended operating range); unused inputs must be held at VCC or GND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74ACT373MDWREP
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: sn74act373mdwrep-etched.step / sn74act373mdwrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74act373mdwrep.step / sn74act373mdwrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (10 pp, sha256 ed1a6b8db3137261, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF