component
SN74ACT244NSR
Public Made by Adomby adom
Texas Instruments Buffers / Drivers, SOIC-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74ACT244NSR
Texas Instruments · Buffers / Drivers · SOIC-20-208mil
SN74ACT244NSR from Texas Instruments, in a SOIC-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable for the 1A/1Y buffers; low passes data from 1A to 1Y, high puts 1Y outputs in high-impedance state. |
| 2 | 1A1 | input | Buffer 1 data input A1, TTL compatible, accepts voltages to 5.5 V. |
| 3 | 2Y4 | tri_state | 3-state noninverted output of 2A4, high-impedance when 2OE is high. |
| 4 | 1A2 | input | Buffer 1 data input A2, TTL compatible, accepts voltages to 5.5 V. |
| 5 | 2Y3 | tri_state | 3-state noninverted output of 2A3, high-impedance when 2OE is high. |
| 6 | 1A3 | input | Buffer 1 data input A3, TTL compatible, accepts voltages to 5.5 V. |
| 7 | 2Y2 | tri_state | 3-state noninverted output of 2A2, high-impedance when 2OE is high. |
| 8 | 1A4 | input | Buffer 1 data input A4, TTL compatible, accepts voltages to 5.5 V. |
| 9 | 2Y1 | tri_state | 3-state noninverted output of 2A1, high-impedance when 2OE is high. |
| 10 | GND | power_in | Ground. |
| 11 | 2A1 | input | Buffer 2 data input A1, TTL compatible, accepts voltages to 5.5 V. |
| 12 | 1Y4 | tri_state | 3-state noninverted output of 1A4, high-impedance when 1OE is high. |
| 13 | 2A2 | input | Buffer 2 data input A2, TTL compatible, accepts voltages to 5.5 V. |
| 14 | 1Y3 | tri_state | 3-state noninverted output of 1A3, high-impedance when 1OE is high. |
| 15 | 2A3 | input | Buffer 2 data input A3, TTL compatible, accepts voltages to 5.5 V. |
| 16 | 1Y2 | tri_state | 3-state noninverted output of 1A2, high-impedance when 1OE is high. |
| 17 | 2A4 | input | Buffer 2 data input A4, TTL compatible, accepts voltages to 5.5 V. |
| 18 | 1Y1 | tri_state | 3-state noninverted output of 1A1, high-impedance when 1OE is high. |
| 19 | 2OE | input | Output enable for the 2A/2Y buffers; low passes data from 2A to 2Y, high puts 2Y outputs in high-impedance state. |
| 20 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-208mil |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-level output voltage | VOH | 4.4 | V | IOH = -50 µA, VCC = 4.5 V | 3 | ||
| High-level output voltage | VOH | 5.4 | V | IOH = -50 µA, VCC = 5.5 V | 3 | ||
| High-level output voltage | VOH | 3.76 | V | IOH = -24 mA, VCC = 4.5 V | 3 | ||
| High-level output voltage | VOH | 4.76 | V | IOH = -24 mA, VCC = 5.5 V | 3 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 50 µA, VCC = 4.5 V | 3 | ||
| Low-level output voltage | VOL | 0.44 | V | IOL = 24 mA, VCC = 4.5 V | 3 | ||
| Off-state output current | IOZ | -2.5 | 2.5 | µA | VO = VCC or GND, VCC = 5.5 V | 3 | |
| Input current | II | -1 | 1 | µA | VI = VCC or GND, VCC = 5.5 V | 3 | |
| Supply current | ICC | 40 | µA | VI = VCC or GND, IO = 0, VCC = 5.5 V | 3 | ||
| Supply current increase per TTL-level input | ΔICC | 1.5 | mA | One input at 3.4 V, other inputs at GND or VCC, VCC = 5.5 V | 3 | ||
| Propagation delay A to Y (low-to-high) | tPLH | 1.5 | 10 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF | 4 | |
| Propagation delay A to Y (high-to-low) | tPHL | 1.5 | 10 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF | 4 | |
| Output enable time OE to Y (to high) | tPZH | 1 | 9.5 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF | 4 | |
| Output enable time OE to Y (to low) | tPZL | 1.5 | 10.5 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF | 4 | |
| Output disable time OE to Y (from high) | tPHZ | 1.5 | 10.5 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF | 4 | |
| Output disable time OE to Y (from low) | tPLZ | 2 | 10.5 | ns | VCC = 5 V ± 0.5 V, CL = 50 pF | 4 | |
| Supply voltage | VCC | 4.5 | 5.5 | V | 3 | ||
| High-level input voltage | VIH | 2 | V | 3 | |||
| Low-level input voltage | VIL | 0.8 | V | 3 | |||
| Input voltage | VI | 0 | 5.5 | V | Max printed as VCC (5.5 V at the VCC maximum) | 3 | |
| Output voltage | VO | 0 | 5.5 | V | Max printed as VCC (5.5 V at the VCC maximum) | 3 | |
| High-level output current | IOH | -24 | mA | 3 | |||
| Low-level output current | IOL | 24 | mA | 3 | |||
| Input transition rise or fall rate | Δt/Δv | 8 | ns/V | 3 | |||
| Operating free-air temperature | TA | -40 | 85 | °C | 3 | ||
| Supply voltage range | VCC | -0.5 | 7 | V | 2 | ||
| Input voltage range | VI | -0.5 | V | -0.5 V to VCC + 0.5 V (Note 1) | 2 | ||
| Output voltage range | VO | -0.5 | V | -0.5 V to VCC + 0.5 V (Note 1) | 2 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VCC | 2 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC | 2 | |
| Continuous output current | IO | -50 | 50 | mA | VO = 0 to VCC | 2 | |
| Continuous current through VCC or GND | -200 | 200 | mA | 2 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 2 | ||
| Package thermal impedance, NS package | θJA | 60 | °C/W | NS package, JESD 51-7 (Note 2) | 2 | ||
| Input capacitance | Ci | 2.5 | pF | VI = VCC or GND, VCC = 5 V | 3 | ||
| Output capacitance | Co | 8 | pF | VI = VCC or GND, VCC = 5 V | 3 | ||
| Power dissipation capacitance per buffer/driver | Cpd | 45 | pF | CL = 50 pF, f = 1 MHz, VCC = 5 V, TA = 25°C | 4 |
CAD (KiCad official)
- Symbol:
SN74ACT244NSR - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-208mil (KiCad packages3D, STEP)
- 3D model files:
sn74act244nsr-etched.step/sn74act244nsr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74act244nsr.step/sn74act244nsr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
3c5d415b3c7fee20, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).