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SN74ACT244IDWREP

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil

SN74ACT244IDWREP from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-low output enable for buffer 1; when high, the 1Y outputs go to the high-impedance state.
2 1A1 input Data input for buffer 1, passed noninverted to 1Y1 when 1OE is low; unused inputs must be held at VCC or GND.
3 2Y4 tri_state Noninverted 3-state output 4 of buffer 2, high-impedance when 2OE is high, with IOH limited to -24 mA and IOL to 24 mA.
4 1A2 input Data input for buffer 1, passed noninverted to 1Y2 when 1OE is low; unused inputs must be held at VCC or GND.
5 2Y3 tri_state Noninverted 3-state output 3 of buffer 2, high-impedance when 2OE is high, with IOH limited to -24 mA and IOL to 24 mA.
6 1A3 input Data input for buffer 1, passed noninverted to 1Y3 when 1OE is low; unused inputs must be held at VCC or GND.
7 2Y2 tri_state Noninverted 3-state output 2 of buffer 2, high-impedance when 2OE is high, with IOH limited to -24 mA and IOL to 24 mA.
8 1A4 input Data input for buffer 1, passed noninverted to 1Y4 when 1OE is low; unused inputs must be held at VCC or GND.
9 2Y1 tri_state Noninverted 3-state output 1 of buffer 2, high-impedance when 2OE is high, with IOH limited to -24 mA and IOL to 24 mA.
10 GND power_in Ground reference; continuous current through VCC or GND is limited to ±200 mA.
11 2A1 input Data input for buffer 2, passed noninverted to 2Y1 when 2OE is low; unused inputs must be held at VCC or GND.
12 1Y4 tri_state Noninverted 3-state output 4 of buffer 1, high-impedance when 1OE is high, with IOH limited to -24 mA and IOL to 24 mA.
13 2A2 input Data input for buffer 2, passed noninverted to 2Y2 when 2OE is low; unused inputs must be held at VCC or GND.
14 1Y3 tri_state Noninverted 3-state output 3 of buffer 1, high-impedance when 1OE is high, with IOH limited to -24 mA and IOL to 24 mA.
15 2A3 input Data input for buffer 2, passed noninverted to 2Y3 when 2OE is low; unused inputs must be held at VCC or GND.
16 1Y2 tri_state Noninverted 3-state output 2 of buffer 1, high-impedance when 1OE is high, with IOH limited to -24 mA and IOL to 24 mA.
17 2A4 input Data input for buffer 2, passed noninverted to 2Y4 when 2OE is low; unused inputs must be held at VCC or GND.
18 1Y1 tri_state Noninverted 3-state output 1 of buffer 1, high-impedance when 1OE is high, with IOH limited to -24 mA and IOL to 24 mA.
19 2OE input Active-low output enable for buffer 2; when high, the 2Y outputs go to the high-impedance state.
20 VCC power_in Supply voltage, 4.5 V to 5.5 V recommended, with an absolute maximum of 7 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74ACT244IDWREP
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: sn74act244idwrep-etched.step / sn74act244idwrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74act244idwrep.step / sn74act244idwrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (13 pp, sha256 449d20612e166c51, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF