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Contents

README

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SN74ACT241PWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

SN74ACT241PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output enable 1 (active low): when 1OE is low the 1Y outputs pass the 1A data, and when 1OE is high the 1Y outputs go to the high-impedance state.
2 1A1 input Data input 1A1 of buffer channel 1; inputs are TTL-compatible and accept voltages up to 5.5 V.
3 2Y4 tri_state 3-state output 2Y4 of buffer channel 2, high-impedance when 2OE is low.
4 1A2 input Data input 1A2 of buffer channel 1; inputs are TTL-compatible and accept voltages up to 5.5 V.
5 2Y3 tri_state 3-state output 2Y3 of buffer channel 2, high-impedance when 2OE is low.
6 1A3 input Data input 1A3 of buffer channel 1; inputs are TTL-compatible and accept voltages up to 5.5 V.
7 2Y2 tri_state 3-state output 2Y2 of buffer channel 2, high-impedance when 2OE is low.
8 1A4 input Data input 1A4 of buffer channel 1; inputs are TTL-compatible and accept voltages up to 5.5 V.
9 2Y1 tri_state 3-state output 2Y1 of buffer channel 2, high-impedance when 2OE is low.
10 GND power_in Ground pin.
11 2A1 input Data input 2A1 of buffer channel 2; inputs are TTL-compatible and accept voltages up to 5.5 V.
12 1Y4 tri_state 3-state output 1Y4 of buffer channel 1, high-impedance when 1OE is high.
13 2A2 input Data input 2A2 of buffer channel 2; inputs are TTL-compatible and accept voltages up to 5.5 V.
14 1Y3 tri_state 3-state output 1Y3 of buffer channel 1, high-impedance when 1OE is high.
15 2A3 input Data input 2A3 of buffer channel 2; inputs are TTL-compatible and accept voltages up to 5.5 V.
16 1Y2 tri_state 3-state output 1Y2 of buffer channel 1, high-impedance when 1OE is high.
17 2A4 input Data input 2A4 of buffer channel 2; inputs are TTL-compatible and accept voltages up to 5.5 V.
18 1Y1 tri_state 3-state output 1Y1 of buffer channel 1, high-impedance when 1OE is high.
19 2OE input Output enable 2 (active high): when 2OE is high the 2Y outputs pass the 2A data, and when 2OE is low the 2Y outputs go to the high-impedance state.
20 VCC power_in Supply voltage, 4.5 V to 5.5 V recommended; bypass close to this pin per the datasheet guidance (0.1 µF for a single supply).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74ACT241PWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74act241pwr-etched.step / sn74act241pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74act241pwr.step / sn74act241pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 fbbcc6531a2607f1, retrieved 2026-10-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF