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SN74ACT10DR

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Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Contents

README

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SN74ACT10DR

Texas Instruments · Logic Gates · SOIC-14

SN74ACT10DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Channel 1, input A to 3-input NAND gate with operating voltage 0 to VCC V, logic high ≥ 2 V, and logic low ≤ 0.8 V.
2 1B input Channel 1, input B to 3-input NAND gate with operating voltage 0 to VCC V, logic high ≥ 2 V, and logic low ≤ 0.8 V.
3 2A input Channel 2, input A to 3-input NAND gate with operating voltage 0 to VCC V, logic high ≥ 2 V, and logic low ≤ 0.8 V.
4 2B input Channel 2, input B to 3-input NAND gate with operating voltage 0 to VCC V, logic high ≥ 2 V, and logic low ≤ 0.8 V.
5 2C input Channel 2, input C to 3-input NAND gate with operating voltage 0 to VCC V, logic high ≥ 2 V, and logic low ≤ 0.8 V.
6 2Y output Channel 2, output Y from 3-input NAND gate with operating voltage 0 to VCC V and output current capability of ±24 mA typical (±50 mA maximum continuous).
7 GND power_in Ground return path with maximum continuous current rating ±200 mA.
8 3Y output Channel 3, output Y from 3-input NAND gate with operating voltage 0 to VCC V and output current capability of ±24 mA typical (±50 mA maximum continuous).
9 3A input Channel 3, input A to 3-input NAND gate with operating voltage 0 to VCC V, logic high ≥ 2 V, and logic low ≤ 0.8 V.
10 3B input Channel 3, input B to 3-input NAND gate with operating voltage 0 to VCC V, logic high ≥ 2 V, and logic low ≤ 0.8 V.
11 3C input Channel 3, input C to 3-input NAND gate with operating voltage 0 to VCC V, logic high ≥ 2 V, and logic low ≤ 0.8 V.
12 1Y output Channel 1, output Y from 3-input NAND gate with operating voltage 0 to VCC V and output current capability of ±24 mA typical (±50 mA maximum continuous).
13 1C input Channel 1, input C to 3-input NAND gate with operating voltage 0 to VCC V, logic high ≥ 2 V, and logic low ≤ 0.8 V.
14 VCC power_in Positive supply voltage with operating range 4.5 to 5.5 V and maximum continuous current ±200 mA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74ACT10DR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74act10dr-etched.step / sn74act10dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74act10dr.step / sn74act10dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (44 pp, sha256 8a3e002c3a25bf91, retrieved 2026-09-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF