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SN74ACT08IDREP

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Texas Instruments Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74ACT08IDREP

Texas Instruments · Gates · SOIC-14

SN74ACT08IDREP from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input A of gate 1; recommended input voltage is 0 to VCC with VIH minimum 2 V and VIL maximum 0.8 V, and it accepts voltages up to 5.5 V.
2 1B input Input B of gate 1; recommended input voltage is 0 to VCC with VIH minimum 2 V and VIL maximum 0.8 V, and it must be held at VCC or GND if unused.
3 1Y output AND output of gate 1 (Y = A·B); rated for high-level output current of −24 mA and low-level output current of 24 mA.
4 2A input Input A of gate 2; recommended input voltage is 0 to VCC with VIH minimum 2 V and VIL maximum 0.8 V, and it accepts voltages up to 5.5 V.
5 2B input Input B of gate 2; recommended input voltage is 0 to VCC with VIH minimum 2 V and VIL maximum 0.8 V, and it must be held at VCC or GND if unused.
6 2Y output AND output of gate 2 (Y = A·B); rated for high-level output current of −24 mA and low-level output current of 24 mA.
7 GND power_in Ground reference pin for the device.
8 3Y output AND output of gate 3 (Y = A·B); rated for high-level output current of −24 mA and low-level output current of 24 mA.
9 3A input Input A of gate 3; recommended input voltage is 0 to VCC with VIH minimum 2 V and VIL maximum 0.8 V, and it accepts voltages up to 5.5 V.
10 3B input Input B of gate 3; recommended input voltage is 0 to VCC with VIH minimum 2 V and VIL maximum 0.8 V, and it must be held at VCC or GND if unused.
11 4Y output AND output of gate 4 (Y = A·B); rated for high-level output current of −24 mA and low-level output current of 24 mA.
12 4A input Input A of gate 4; recommended input voltage is 0 to VCC with VIH minimum 2 V and VIL maximum 0.8 V, and it accepts voltages up to 5.5 V.
13 4B input Input B of gate 4; recommended input voltage is 0 to VCC with VIH minimum 2 V and VIL maximum 0.8 V, and it must be held at VCC or GND if unused.
14 VCC power_in Supply voltage, recommended 4.5 V to 5.5 V with an absolute maximum of 7 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.5 5.5 V 2
High-level input voltage VIH 2 V 2
Low-level input voltage VIL 0.8 V 2
Input voltage VI 0 V printed maximum is VCC 2
Output voltage VO 0 V printed maximum is VCC 2
High-level output current IOH -24 mA 2
Low-level output current IOL 24 mA 2
Input transition rise or fall rate ∆t/∆v 8 ns/V 2
Operating free-air temperature TA -40 85 °C 2
Supply voltage range VCC -0.5 7 V 2
Input voltage range (printed maximum VCC + 0.5 V) VI -0.5 V see Note 1 2
Output voltage range (printed maximum VCC + 0.5 V) VO -0.5 V see Note 1 2
Input clamp current IIK -20 20 mA VI < 0 or VI > VCC 2
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC 2
Continuous output current IO -50 50 mA VO = 0 to VCC 2
Continuous current through VCC or GND ICC/IGND -200 200 mA 2
Storage temperature range Tstg -65 150 °C 2
Package thermal impedance θJA 86 °C/W see Note 2, JESD 51-7 2
High-level output voltage VOH 4.4 V IOH = −50 µA, VCC = 4.5 V 3
High-level output voltage VOH 5.4 V IOH = −50 µA, VCC = 5.5 V 3
High-level output voltage VOH 3.76 V IOH = −24 mA, VCC = 4.5 V 3
High-level output voltage VOH 4.76 V IOH = −24 mA, VCC = 5.5 V 3
High-level output voltage VOH 3.85 V IOH = −75 mA, VCC = 5.5 V (footnote †: one output at a time, ≤2 ms) 3
Low-level output voltage VOL 0.1 V IOL = 50 µA, VCC = 4.5 V 3
Low-level output voltage VOL 0.44 V IOL = 24 mA, VCC = 4.5 V 3
Low-level output voltage VOL 1.65 V IOL = 75 mA, VCC = 5.5 V (footnote †: one output at a time, ≤2 ms) 3
Input current II 1 µA VI = VCC or GND, VCC = 5.5 V 3
Supply current ICC 20 µA VI = VCC or GND, IO = 0, VCC = 5.5 V 3
Supply current increase per TTL-level input ICC 1.5 mA one input at 3.4 V, other inputs at GND or VCC, VCC = 5.5 V (footnote ‡) 3
Propagation delay low-to-high tPLH 1 10 ns A or B to Y, VCC = 5 V ± 0.5 V, see Figure 1 3
Propagation delay high-to-low tPHL 1 10 ns A or B to Y, VCC = 5 V ± 0.5 V, see Figure 1 3

CAD (KiCad official)

  • Symbol: SN74ACT08IDREP
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74act08idrep-etched.step / sn74act08idrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74act08idrep.step / sn74act08idrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (12 pp, sha256 a12afbe2fea81c0d, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF