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SN74AC86PWR

Public Made by Adom

by adom

Texas Instruments Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs sn74ac86pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers sn74ac86pwr: viewers · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Initial commit: component/sn74ac86pwr · Ray 4d ago
sn74ac86pwr-etched.fit.json sn74ac86pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn74ac86pwr-etched.glb sn74ac86pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn74ac86pwr-etched.step sn74ac86pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
sn74ac86pwr.glb Publish 0.1.0 · Ray 4d ago
sn74ac86pwr.kicad_mod Publish 0.1.0 · Ray 4d ago
sn74ac86pwr.kicad_sym Publish 0.1.0 · Ray 4d ago
sn74ac86pwr.lbr Publish 0.1.0 · Ray 4d ago
sn74ac86pwr.step Publish 0.1.0 · Ray 4d ago

SN74AC86PWR

Texas Instruments · Logic Gates · TSSOP-14

SN74AC86PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input XOR gate 1 input A; accepts voltage levels 0 to VCC.
2 1B input XOR gate 1 input B; accepts voltage levels 0 to VCC.
3 1Y output XOR gate 1 output Y; produces voltage levels 0 to VCC.
4 2A input XOR gate 2 input A; accepts voltage levels 0 to VCC.
5 2B input XOR gate 2 input B; accepts voltage levels 0 to VCC.
6 2Y output XOR gate 2 output Y; produces voltage levels 0 to VCC.
7 GND power_in Ground; power supply return reference.
8 3Y output XOR gate 3 output Y; produces voltage levels 0 to VCC.
9 3A input XOR gate 3 input A; accepts voltage levels 0 to VCC.
10 3B input XOR gate 3 input B; accepts voltage levels 0 to VCC.
11 4Y output XOR gate 4 output Y; produces voltage levels 0 to VCC.
12 4A input XOR gate 4 input A; accepts voltage levels 0 to VCC.
13 4B input XOR gate 4 input B; accepts voltage levels 0 to VCC.
14 VCC power_in Positive power supply; 2V to 6V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74AC86PWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ac86pwr-etched.step / sn74ac86pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ac86pwr.step / sn74ac86pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 3bc2f669d04b2329, retrieved 2026-10-01, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF