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SN74AC86N

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Texas Instruments Logic Gates, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN74AC86N

Texas Instruments · Logic Gates · PDIP-14

SN74AC86N from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Channel 1 input A of the XOR gate; the gate outputs Y = A ⊕ B, so this input works with 1B to set output 1Y.
2 1B input Channel 1 input B of the XOR gate; the gate outputs Y = A ⊕ B, so this input works with 1A to set output 1Y.
3 1Y output Channel 1 XOR gate output Y, which is high when inputs 1A and 1B are at different logic levels.
4 2A input Channel 2 input A of the XOR gate; the gate outputs Y = A ⊕ B, so this input works with 2B to set output 2Y.
5 2B input Channel 2 input B of the XOR gate; the gate outputs Y = A ⊕ B, so this input works with 2A to set output 2Y.
6 2Y output Channel 2 XOR gate output Y, which is high when inputs 2A and 2B are at different logic levels.
7 GND power_in Ground reference for the device.
8 3Y output Channel 3 XOR gate output Y, which is high when inputs 3A and 3B are at different logic levels.
9 3A input Channel 3 input A of the XOR gate; the gate outputs Y = A ⊕ B, so this input works with 3B to set output 3Y.
10 3B input Channel 3 input B of the XOR gate; the gate outputs Y = A ⊕ B, so this input works with 3A to set output 3Y.
11 4Y output Channel 4 XOR gate output Y, which is high when inputs 4A and 4B are at different logic levels.
12 4A input Channel 4 input A of the XOR gate; the gate outputs Y = A ⊕ B, so this input works with 4B to set output 4Y.
13 4B input Channel 4 input B of the XOR gate; the gate outputs Y = A ⊕ B, so this input works with 4A to set output 4Y.
14 VCC power_in Positive supply; the datasheet recommends 2 V to 6 V VCC and a 0.1 µF bypass capacitor placed close to this pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 2 6 V 5
High-level input voltage VIH 2.1 V VCC = 3V 5
High-level input voltage VIH 3.15 V VCC = 4.5V 5
High-level input voltage VIH 3.85 V VCC = 5.5V 5
Low-level input voltage VIL 0.9 V VCC = 3V 5
Low-level input voltage VIL 1.35 V VCC = 4.5V 5
Low-level input voltage VIL 1.65 V VCC = 5.5V 5
Input voltage VI 0 V 5
Output voltage VO 0 V 5
High-level output current IOH -12 mA VCC = 3V 5
High-level output current IOH -24 mA VCC = 4.5V 5
Low-level output current IOL 12 mA VCC = 3V 5
Low-level output current IOL 24 mA VCC = 4.5V 5
Input transition rise or fall rate Δt/Δv 8 ns/V 5
Operating free-air temperature TA -40 85 °C 5
Supply voltage range VCC -0.5 7 V 5
Input voltage range VI -0.5 V 5
Output voltage range VO -0.5 V 5
Input clamp current IIK -20 20 mA VI < 0 or VI > VCC 5
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC 5
Continuous output current IO -50 50 mA VO = 0 to VCC 5
Storage temperature range Tstg -65 150 °C 5
High-level output voltage VOH 2.9 V IOH = -50µA, VCC = 3V 6
High-level output voltage VOH 4.4 V IOH = -50µA, VCC = 4.5V 6
High-level output voltage VOH 5.4 V IOH = -50µA, VCC = 5.5V 6
High-level output voltage VOH 2.46 V IOH = -12mA, VCC = 3V 6
High-level output voltage VOH 3.76 V IOH = -24mA, VCC = 4.5V 6
High-level output voltage VOH 4.76 V IOH = -24mA, VCC = 5.5V 6
Low-level output voltage VOL 0.1 V IOL = 50µA, VCC = 3V 6
Low-level output voltage VOL 0.44 V IOL = 12mA, VCC = 3V 6
Input leakage current II -1 1 µA VI = VCC or GND, VCC = 5.5V 6
Supply current ICC 20 µA VI = VCC or GND, IO = 0, VCC = 5.5V 6
Propagation delay low-to-high (A or B to Y) tPLH 1.5 12.5 ns VCC = 3.3V ± 0.3V 7
Propagation delay high-to-low (A or B to Y) tPHL 1.5 12.5 ns VCC = 3.3V ± 0.3V 7
Propagation delay low-to-high (A or B to Y) tPLH 1 9 ns VCC = 5V ± 0.5V 7
Propagation delay high-to-low (A or B to Y) tPHL 1 9.5 ns VCC = 5V ± 0.5V 7
Junction-to-ambient thermal resistance (N, PDIP-14 package) RθJA 80 °C/W N package (PDIP, 14 pins) 6

CAD (KiCad official)

  • Symbol: SN74AC86N
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: PDIP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ac86n-etched.step / sn74ac86n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ac86n.step / sn74ac86n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (39 pp, sha256 bc2f9328ae6e1ed7, retrieved 2026-10-16, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF