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SN74AC374DWR

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Texas Instruments Flip Flops, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogicsn74ac374dwrfactory-2.0.0extractor-text

Verified SN74AC374DWR

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 20 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SN74AC374DWR · SOIC-20-300mil · 20 pins
  • ✓copper: 20 copper pads, none touching another net
  • ✓datasheet: all 20 pin names found in the 32-page datasheet
  • ✓distributor: lcsc C2867339, digikey 296-1060-2-ND, mouser 595-SN74AC374DWR
  • ✓family: SOIC-20W_7.5x12.8mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-uumg558c/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 20 pins = 20 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 20 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sn74ac374dwr.kicad_sym✓ sn74ac374dwr.kicad_mod✓ sn74ac374dwr.step
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Ray Publish 0.1.0 78f4e6a 7h ago

SN74AC374DWR

Texas Instruments · Flip Flops · SOIC-20-300mil

SN74AC374DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Output enable; when high, outputs 1Q to 8Q go to the high-impedance state, and OE must be tied to VCC through a pullup resistor for a defined high-impedance state during power up or power down.
2 1Q tri_state Output 1, a 3-state noninverting output that drives bus lines directly.
3 1D input Data input 1, loaded into the flip-flop on the positive transition of CLK.
4 2D input Data input 2, loaded into the flip-flop on the positive transition of CLK.
5 2Q tri_state Output 2, a 3-state noninverting output that drives bus lines directly.
6 3Q tri_state Output 3, a 3-state noninverting output that drives bus lines directly.
7 3D input Data input 3, loaded into the flip-flop on the positive transition of CLK.
8 4D input Data input 4, loaded into the flip-flop on the positive transition of CLK.
9 4Q tri_state Output 4, a 3-state noninverting output that drives bus lines directly.
10 GND power_in Ground pin.
11 CLK input Clock input; on its positive transition the Q outputs take the logic levels set at the D inputs.
12 5Q tri_state Output 5, a 3-state noninverting output that drives bus lines directly.
13 5D input Data input 5, loaded into the flip-flop on the positive transition of CLK.
14 6D input Data input 6, loaded into the flip-flop on the positive transition of CLK.
15 6Q tri_state Output 6, a 3-state noninverting output that drives bus lines directly.
16 7Q tri_state Output 7, a 3-state noninverting output that drives bus lines directly.
17 7D input Data input 7, loaded into the flip-flop on the positive transition of CLK.
18 8D input Data input 8, loaded into the flip-flop on the positive transition of CLK.
19 8Q tri_state Output 8, a 3-state noninverting output that drives bus lines directly.
20 VCC power_in Supply pin; the device operates from 2 V to 6 V VCC.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 2 6 V 4
Supply voltage range VCC -0.5 7 V Over operating free-air temperature range 4
Input voltage range VI -0.5 V Max VCC + 0.5 V as printed 4
Output voltage range VO -0.5 V Max VCC + 0.5 V as printed 4
Input clamp current IIK -20 20 mA VI < 0 or VI > VCC 4
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC 4
Continuous output current IO -50 50 mA VO = 0 to VCC 4
Continuous current through VCC or GND -200 200 mA 4
Storage temperature range Tstg -65 150 °C 4
High-level input voltage VIH 2.1 V VCC = 3 V 4
High-level input voltage VIH 3.15 V VCC = 4.5 V 4
High-level input voltage VIH 3.85 V VCC = 5.5 V 4
Low-level input voltage VIL 0.9 V VCC = 3 V 4
Low-level input voltage VIL 1.35 V VCC = 4.5 V 4
Low-level input voltage VIL 1.65 V VCC = 5.5 V 4
Input voltage VI 0 V Max VCC 4
Output voltage VO 0 V Max VCC 4
High-level output current IOH -12 mA VCC = 3 V 4
High-level output current IOH -24 mA VCC = 4.5 V 4
Low-level output current IOL 12 mA VCC = 3 V 4
Low-level output current IOL 24 mA VCC = 4.5 V 4
Input transition rise or fall rate Δt/Δv 8 ns/V 4
Operating free-air temperature TA -40 85 °C SN74AC374 4
High-level output voltage VOH 2.9 V IOH = −50 μA, VCC = 3 V 5
High-level output voltage VOH 4.4 V IOH = −50 μA, VCC = 4.5 V 5
High-level output voltage VOH 5.4 V IOH = −50 μA, VCC = 5.5 V 5
High-level output voltage VOH 2.46 V IOH = −12 mA, VCC = 3 V 5
High-level output voltage VOH 3.76 V IOH = −24 mA, VCC = 4.5 V 5
High-level output voltage VOH 4.76 V IOH = −24 mA, VCC = 5.5 V 5
Low-level output voltage VOL 0.1 V IOL = 50 μA, VCC = 3 V 5
Low-level output voltage VOL 0.44 V IOL = 12 mA, VCC = 3 V 5
Input current II -1 1 μA VI = VCC or GND, VCC = 5.5 V 5
Off-state output current IOZ -2.5 2.5 μA VO = VCC or GND, VCC = 5.5 V 5
Quiescent supply current ICC 4 40 μA VI = VCC or GND, IO = 0, VCC = 5.5 V 5
Input capacitance Ci 4.5 pF VI = VCC or GND, VCC = 5 V 5
Clock frequency fclock 60 MHz VCC = 3.3 V ± 0.3 V 5
Pulse duration, CLK high or low tw 6 ns VCC = 3.3 V ± 0.3 V 5
Setup time, data before CLK↑ tsu 6 ns VCC = 3.3 V ± 0.3 V 5
Hold time, data after CLK↑ th 1 ns VCC = 3.3 V ± 0.3 V 5
Clock frequency fclock 100 MHz VCC = 5 V ± 0.5 V 6
Pulse duration, CLK high or low tw 4.5 ns VCC = 5 V ± 0.5 V 6
Setup time, data before CLK↑ tsu 4.5 ns VCC = 5 V ± 0.5 V 6
Hold time, data after CLK↑ th 1.5 ns VCC = 5 V ± 0.5 V 6
Maximum clock frequency fmax 60 110 MHz VCC = 3.3 V ± 0.3 V 6
Propagation delay CLK to Q (tPLH) tPLH 1.5 11 15.5 ns VCC = 3.3 V ± 0.3 V 6
Propagation delay CLK to Q (tPHL) tPHL 2 10 14 ns VCC = 3.3 V ± 0.3 V 6
Enable time OE to Q (tPZH) tPZH 1.5 9.5 13 ns VCC = 3.3 V ± 0.3 V 6
Enable time OE to Q (tPZL) tPZL 1.5 9 13 ns VCC = 3.3 V ± 0.3 V 6
Disable time OE to Q (tPHZ) tPHZ 2 10.5 14.5 ns VCC = 3.3 V ± 0.3 V 6
Disable time OE to Q (tPLZ) tPLZ 1 8 12.5 ns VCC = 3.3 V ± 0.3 V 6
Maximum clock frequency fmax 100 155 MHz VCC = 5 V ± 0.5 V 6
Propagation delay CLK to Q (tPLH) tPLH 1.5 8 10.5 ns VCC = 5 V ± 0.5 V 6
Propagation delay CLK to Q (tPHL) tPHL 1.5 7 10 ns VCC = 5 V ± 0.5 V 6
Enable time OE to Q (tPZH) tPZH 1 7 9.5 ns VCC = 5 V ± 0.5 V 6
Enable time OE to Q (tPZL) tPZL 1 6.5 9.5 ns VCC = 5 V ± 0.5 V 6
Disable time OE to Q (tPHZ) tPHZ 2 8 12.5 ns VCC = 5 V ± 0.5 V 6
Disable time OE to Q (tPLZ) tPLZ 1 6.5 10 ns VCC = 5 V ± 0.5 V 6
Power dissipation capacitance Cpd 40 pF VCC = 5 V, CL = 50 pF, f = 1 MHz 6
Junction-to-ambient thermal resistance (DW, SOIC) RθJA 101.2 °C/W DW (SOIC) 20 pins 5

CAD (KiCad official)

  • Symbol: SN74AC374DWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: sn74ac374dwr-etched.step / sn74ac374dwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ac374dwr.step / sn74ac374dwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 a9734b168fcab6c6, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF