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Contents

README

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SN74AC244DWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil

SN74AC244DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output enable for first buffer (active low); when low outputs follow inputs, when high outputs are high-impedance
2 1A1 input Data input to first buffer; non-inverted buffered output at 1Y1 when 1OE is low
3 2Y4 tri_state Tri-state output of second buffer; non-inverted 2A4 when 2OE is low, high-impedance when 2OE is high
4 1A2 input Data input to first buffer; non-inverted buffered output at 1Y2 when 1OE is low
5 2Y3 tri_state Tri-state output of second buffer; non-inverted 2A3 when 2OE is low, high-impedance when 2OE is high
6 1A3 input Data input to first buffer; non-inverted buffered output at 1Y3 when 1OE is low
7 2Y2 tri_state Tri-state output of second buffer; non-inverted 2A2 when 2OE is low, high-impedance when 2OE is high
8 1A4 input Data input to first buffer; non-inverted buffered output at 1Y4 when 1OE is low
9 2Y1 tri_state Tri-state output of second buffer; non-inverted 2A1 when 2OE is low, high-impedance when 2OE is high
10 GND power_in Ground reference
11 2A1 input Data input to second buffer; non-inverted buffered output at 2Y1 when 2OE is low
12 1Y4 tri_state Tri-state output of first buffer; non-inverted 1A4 when 1OE is low, high-impedance when 1OE is high
13 2A2 input Data input to second buffer; non-inverted buffered output at 2Y2 when 2OE is low
14 1Y3 tri_state Tri-state output of first buffer; non-inverted 1A3 when 1OE is low, high-impedance when 1OE is high
15 2A3 input Data input to second buffer; non-inverted buffered output at 2Y3 when 2OE is low
16 1Y2 tri_state Tri-state output of first buffer; non-inverted 1A2 when 1OE is low, high-impedance when 1OE is high
17 2A4 input Data input to second buffer; non-inverted buffered output at 2Y4 when 2OE is low
18 1Y1 tri_state Tri-state output of first buffer; non-inverted 1A1 when 1OE is low, high-impedance when 1OE is high
19 2OE input Output enable for second buffer (active low); when low outputs follow inputs, when high outputs are high-impedance
20 VCC power_in Power supply; 2V to 6V operating voltage range

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74AC244DWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: sn74ac244dwr-etched.step / sn74ac244dwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ac244dwr.step / sn74ac244dwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (39 pp, sha256 397f6e995ef8b8fd, retrieved 2026-09-26, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF