component
SN74AC14N
Public Made by Adomby adom
Texas Instruments Inverters, PDIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74AC14N
Texas Instruments · Inverters · PDIP-14
SN74AC14N from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Channel 1 Schmitt-trigger inverter input A. |
| 2 | 1Y | output | Channel 1 inverter output Y (balanced CMOS push-pull). |
| 3 | 2A | input | Channel 2 Schmitt-trigger inverter input A. |
| 4 | 2Y | output | Channel 2 inverter output Y (balanced CMOS push-pull). |
| 5 | 3A | input | Channel 3 Schmitt-trigger inverter input A. |
| 6 | 3Y | output | Channel 3 inverter output Y (balanced CMOS push-pull). |
| 7 | GND | power_in | Ground. |
| 8 | 4Y | output | Channel 4 inverter output Y (balanced CMOS push-pull). |
| 9 | 4A | input | Channel 4 Schmitt-trigger inverter input A. |
| 10 | 5Y | output | Channel 5 inverter output Y (balanced CMOS push-pull). |
| 11 | 5A | input | Channel 5 Schmitt-trigger inverter input A. |
| 12 | 6Y | output | Channel 6 inverter output Y (balanced CMOS push-pull). |
| 13 | 6A | input | Channel 6 Schmitt-trigger inverter input A. |
| 14 | VCC | power_in | Positive supply, 2 V to 6 V recommended operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2 | 6 | V | SN74AC14 | 5 | |
| Input voltage | VI | 0 | V | 0 to VCC | 5 | ||
| Output voltage | VO | 0 | V | 0 to VCC | 5 | ||
| High-level output current | IOH | -12 | mA | VCC = 3 V | 5 | ||
| High-level output current | IOH | -24 | mA | VCC = 4.5 V | 5 | ||
| Low-level output current | IOL | 12 | mA | VCC = 3 V | 5 | ||
| Low-level output current | IOL | 24 | mA | VCC = 4.5 V | 5 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | SN74AC14 | 5 | |
| Positive-going threshold | VT+ | 0.8 | 1.8 | 2.2 | V | VCC = 3 V; typ at TA = 25°C | 6 |
| Positive-going threshold | VT+ | 1.5 | 2.6 | 3.2 | V | VCC = 4.5 V; typ at TA = 25°C | 6 |
| Positive-going threshold | VT+ | 1.6 | 3.2 | 3.9 | V | VCC = 5.5 V; typ at TA = 25°C | 6 |
| Negative-going threshold | VT- | 0.5 | 0.8 | 1 | V | VCC = 3 V; typ at TA = 25°C | 6 |
| Negative-going threshold | VT- | 0.9 | 1.4 | 1.8 | V | VCC = 4.5 V; typ at TA = 25°C | 6 |
| Negative-going threshold | VT- | 1.1 | 1.8 | 2.3 | V | VCC = 5.5 V; typ at TA = 25°C | 6 |
| Hysteresis (VT+ - VT-) | ΔVT | 0.3 | 1 | 1.2 | V | VCC = 3 V; typ at TA = 25°C | 6 |
| Hysteresis (VT+ - VT-) | ΔVT | 0.4 | 1.2 | 1.4 | V | VCC = 4.5 V; typ at TA = 25°C | 6 |
| Hysteresis (VT+ - VT-) | ΔVT | 0.5 | 1.4 | 1.6 | V | VCC = 5.5 V; typ at TA = 25°C | 6 |
| High-level output voltage | VOH | 2.9 | V | IOH = -50 μA, VCC = 3 V | 6 | ||
| High-level output voltage | VOH | 4.4 | V | IOH = -50 μA, VCC = 4.5 V | 6 | ||
| High-level output voltage | VOH | 5.4 | V | IOH = -50 μA, VCC = 5.5 V | 6 | ||
| High-level output voltage | VOH | 2.48 | V | IOH = -12 mA, VCC = 3 V | 6 | ||
| High-level output voltage | VOH | 3.8 | V | IOH = -24 mA, VCC = 4.5 V | 6 | ||
| High-level output voltage | VOH | 4.8 | V | IOH = -24 mA, VCC = 5.5 V | 6 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 50 μA, VCC = 3 V | 6 | ||
| Low-level output voltage | VOL | 0.44 | V | IOL = 12 mA, VCC = 3 V | 6 | ||
| Input current | II | -1 | 1 | μA | VI = VCC or GND, VCC = 5.5 V | 6 | |
| Supply current | ICC | 20 | μA | VI = VCC or GND, IO = 0, VCC = 5.5 V | 6 | ||
| Input capacitance | Ci | 4.5 | pF | VI = VCC or GND, VCC = 5 V | 6 | ||
| Propagation delay A to Y (low-to-high) | tPLH | 1.5 | 6 | 15 | ns | VCC = 3.3 V ± 0.3 V; typ at TA = 25°C | 6 |
| Propagation delay A to Y (high-to-low) | tPHL | 1.5 | 6 | 13 | ns | VCC = 3.3 V ± 0.3 V; typ at TA = 25°C | 6 |
| Propagation delay A to Y (low-to-high) | tPLH | 1.5 | 5 | 11 | ns | VCC = 5 V ± 0.5 V; typ at TA = 25°C | 7 |
| Propagation delay A to Y (high-to-low) | tPHL | 1.5 | 5 | 9.5 | ns | VCC = 5 V ± 0.5 V; typ at TA = 25°C | 7 |
| Power dissipation capacitance | Cpd | 25 | pF | CL = 50 pF, f = 1 MHz, VCC = 5 V, TA = 25°C | 7 | ||
| Supply voltage range | VCC | -0.5 | 7 | V | 5 | ||
| Input voltage range | VI | -0.5 | V | max is VCC + 0.5 V | 5 | ||
| Output voltage range | VO | -0.5 | V | max is VCC + 0.5 V | 5 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VCC | 5 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC | 5 | |
| Continuous output current | IO | -50 | 50 | mA | VO = 0 to VCC | 5 | |
| Continuous current through VCC or GND | -200 | 200 | mA | 5 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 5 | ||
| ESD HBM | V(ESD) | -4000 | 4000 | V | Human body model, all pins | 5 | |
| ESD CDM | V(ESD) | -2000 | 2000 | V | Charged device model, all pins | 5 | |
| Junction-to-ambient thermal resistance | RθJA | 80 | °C/W | N (PDIP), 14 pins | 5 |
CAD (KiCad official)
- Symbol:
SN74AC14N - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74ac14n-etched.step/sn74ac14n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ac14n.step/sn74ac14n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (33 pp, sha256
998abc16935bab41, retrieved 2026-10-26, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74AC14N
**Texas Instruments** · Inverters · PDIP-14
SN74AC14N from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Channel 1 Schmitt-trigger inverter input A. |
| 2 | 1Y | output | Channel 1 inverter output Y (balanced CMOS push-pull). |
| 3 | 2A | input | Channel 2 Schmitt-trigger inverter input A. |
| 4 | 2Y | output | Channel 2 inverter output Y (balanced CMOS push-pull). |
| 5 | 3A | input | Channel 3 Schmitt-trigger inverter input A. |
| 6 | 3Y | output | Channel 3 inverter output Y (balanced CMOS push-pull). |
| 7 | GND | power_in | Ground. |
| 8 | 4Y | output | Channel 4 inverter output Y (balanced CMOS push-pull). |
| 9 | 4A | input | Channel 4 Schmitt-trigger inverter input A. |
| 10 | 5Y | output | Channel 5 inverter output Y (balanced CMOS push-pull). |
| 11 | 5A | input | Channel 5 Schmitt-trigger inverter input A. |
| 12 | 6Y | output | Channel 6 inverter output Y (balanced CMOS push-pull). |
| 13 | 6A | input | Channel 6 Schmitt-trigger inverter input A. |
| 14 | VCC | power_in | Positive supply, 2 V to 6 V recommended operating range. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | PDIP-14 |
| Category | Logic ICs |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2 | | 6 | V | SN74AC14 | 5 |
| Input voltage | VI | 0 | | | V | 0 to VCC | 5 |
| Output voltage | VO | 0 | | | V | 0 to VCC | 5 |
| High-level output current | IOH | -12 | | | mA | VCC = 3 V | 5 |
| High-level output current | IOH | -24 | | | mA | VCC = 4.5 V | 5 |
| Low-level output current | IOL | | | 12 | mA | VCC = 3 V | 5 |
| Low-level output current | IOL | | | 24 | mA | VCC = 4.5 V | 5 |
| Operating free-air temperature | TA | -40 | | 85 | °C | SN74AC14 | 5 |
| Positive-going threshold | VT+ | 0.8 | 1.8 | 2.2 | V | VCC = 3 V; typ at TA = 25°C | 6 |
| Positive-going threshold | VT+ | 1.5 | 2.6 | 3.2 | V | VCC = 4.5 V; typ at TA = 25°C | 6 |
| Positive-going threshold | VT+ | 1.6 | 3.2 | 3.9 | V | VCC = 5.5 V; typ at TA = 25°C | 6 |
| Negative-going threshold | VT- | 0.5 | 0.8 | 1 | V | VCC = 3 V; typ at TA = 25°C | 6 |
| Negative-going threshold | VT- | 0.9 | 1.4 | 1.8 | V | VCC = 4.5 V; typ at TA = 25°C | 6 |
| Negative-going threshold | VT- | 1.1 | 1.8 | 2.3 | V | VCC = 5.5 V; typ at TA = 25°C | 6 |
| Hysteresis (VT+ - VT-) | ΔVT | 0.3 | 1 | 1.2 | V | VCC = 3 V; typ at TA = 25°C | 6 |
| Hysteresis (VT+ - VT-) | ΔVT | 0.4 | 1.2 | 1.4 | V | VCC = 4.5 V; typ at TA = 25°C | 6 |
| Hysteresis (VT+ - VT-) | ΔVT | 0.5 | 1.4 | 1.6 | V | VCC = 5.5 V; typ at TA = 25°C | 6 |
| High-level output voltage | VOH | 2.9 | | | V | IOH = -50 μA, VCC = 3 V | 6 |
| High-level output voltage | VOH | 4.4 | | | V | IOH = -50 μA, VCC = 4.5 V | 6 |
| High-level output voltage | VOH | 5.4 | | | V | IOH = -50 μA, VCC = 5.5 V | 6 |
| High-level output voltage | VOH | 2.48 | | | V | IOH = -12 mA, VCC = 3 V | 6 |
| High-level output voltage | VOH | 3.8 | | | V | IOH = -24 mA, VCC = 4.5 V | 6 |
| High-level output voltage | VOH | 4.8 | | | V | IOH = -24 mA, VCC = 5.5 V | 6 |
| Low-level output voltage | VOL | | | 0.1 | V | IOL = 50 μA, VCC = 3 V | 6 |
| Low-level output voltage | VOL | | | 0.44 | V | IOL = 12 mA, VCC = 3 V | 6 |
| Input current | II | -1 | | 1 | μA | VI = VCC or GND, VCC = 5.5 V | 6 |
| Supply current | ICC | | | 20 | μA | VI = VCC or GND, IO = 0, VCC = 5.5 V | 6 |
| Input capacitance | Ci | | 4.5 | | pF | VI = VCC or GND, VCC = 5 V | 6 |
| Propagation delay A to Y (low-to-high) | tPLH | 1.5 | 6 | 15 | ns | VCC = 3.3 V ± 0.3 V; typ at TA = 25°C | 6 |
| Propagation delay A to Y (high-to-low) | tPHL | 1.5 | 6 | 13 | ns | VCC = 3.3 V ± 0.3 V; typ at TA = 25°C | 6 |
| Propagation delay A to Y (low-to-high) | tPLH | 1.5 | 5 | 11 | ns | VCC = 5 V ± 0.5 V; typ at TA = 25°C | 7 |
| Propagation delay A to Y (high-to-low) | tPHL | 1.5 | 5 | 9.5 | ns | VCC = 5 V ± 0.5 V; typ at TA = 25°C | 7 |
| Power dissipation capacitance | Cpd | | 25 | | pF | CL = 50 pF, f = 1 MHz, VCC = 5 V, TA = 25°C | 7 |
| Supply voltage range | VCC | -0.5 | | 7 | V | | 5 |
| Input voltage range | VI | -0.5 | | | V | max is VCC + 0.5 V | 5 |
| Output voltage range | VO | -0.5 | | | V | max is VCC + 0.5 V | 5 |
| Input clamp current | IIK | -20 | | 20 | mA | VI < 0 or VI > VCC | 5 |
| Output clamp current | IOK | -20 | | 20 | mA | VO < 0 or VO > VCC | 5 |
| Continuous output current | IO | -50 | | 50 | mA | VO = 0 to VCC | 5 |
| Continuous current through VCC or GND | | -200 | | 200 | mA | | 5 |
| Storage temperature range | Tstg | -65 | | 150 | °C | | 5 |
| ESD HBM | V(ESD) | -4000 | | 4000 | V | Human body model, all pins | 5 |
| ESD CDM | V(ESD) | -2000 | | 2000 | V | Charged device model, all pins | 5 |
| Junction-to-ambient thermal resistance | RθJA | | 80 | | °C/W | N (PDIP), 14 pins | 5 |
## CAD (KiCad official)
- Symbol: `SN74AC14N`
- Footprint: `Package_DIP:DIP-14_W7.62mm`
- 3D model: PDIP-14 (KiCad packages3D, STEP)
- 3D model files: `sn74ac14n-etched.step` / `sn74ac14n-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74ac14n.step` / `sn74ac14n.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74ac14n.pdf) (33 pp, sha256 `998abc16935bab41`, retrieved 2026-10-26, tier: manufacturer)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74ac14n-datasheet.pdf)