component

SN74AC08QDRG4Q1

Public Made by Adom

by adom

Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogicsn74ac08qdrg4q1factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers sn74ac08qdrg4q1: viewers · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago
sn74ac08qdrg4q1-etched.glb Publish 0.1.0 · Ray 8d ago
sn74ac08qdrg4q1-etched.step sn74ac08qdrg4q1: factory component page (tier=lcsc) · Ray 8d ago
sn74ac08qdrg4q1-hero.glb sn74ac08qdrg4q1: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
sn74ac08qdrg4q1-hero.overlay.json Publish 0.1.0 · Ray 8d ago
sn74ac08qdrg4q1.glb Publish 0.1.0 · Ray 8d ago
sn74ac08qdrg4q1.kicad_mod Publish 0.1.0 · Ray 8d ago
sn74ac08qdrg4q1.kicad_sym Publish 0.1.0 · Ray 8d ago
sn74ac08qdrg4q1.lbr Publish 0.1.0 · Ray 8d ago
sn74ac08qdrg4q1.step Publish 0.1.0 · Ray 8d ago

SN74AC08QDRG4Q1

Texas Instruments · Logic Gates · SOIC-14

SN74AC08QDRG4Q1 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Channel 1 AND-gate input A; with B high, Y follows A, and unused inputs must be held at VCC or GND.
2 1B input Channel 1 AND-gate input B; with A high, Y follows B, and unused inputs must be held at VCC or GND.
3 1Y output Channel 1 AND-gate output Y, high only when both inputs are high; continuous output current is limited to ±50 mA.
4 2A input Channel 2 AND-gate input A; with B high, Y follows A, and unused inputs must be held at VCC or GND.
5 2B input Channel 2 AND-gate input B; with A high, Y follows B, and unused inputs must be held at VCC or GND.
6 2Y output Channel 2 AND-gate output Y, high only when both inputs are high; continuous output current is limited to ±50 mA.
7 GND power_in Ground reference for the device.
8 3Y output Channel 3 AND-gate output Y, high only when both inputs are high; continuous output current is limited to ±50 mA.
9 3A input Channel 3 AND-gate input A; with B high, Y follows A, and unused inputs must be held at VCC or GND.
10 3B input Channel 3 AND-gate input B; with A high, Y follows B, and unused inputs must be held at VCC or GND.
11 4Y output Channel 4 AND-gate output Y, high only when both inputs are high; continuous output current is limited to ±50 mA.
12 4A input Channel 4 AND-gate input A; with B high, Y follows A, and unused inputs must be held at VCC or GND.
13 4B input Channel 4 AND-gate input B; with A high, Y follows B, and unused inputs must be held at VCC or GND.
14 VCC power_in Positive supply; recommended operating range is 2 V to 6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 2 6 V 4
High-level input voltage VIH 2.1 V VCC = 3V 4
High-level input voltage VIH 3.15 V VCC = 4.5V 4
High-level input voltage VIH 3.85 V VCC = 5.5V 4
Low-level input voltage VIL 0.9 V VCC = 3V 4
Low-level input voltage VIL 1.35 V VCC = 4.5V 4
Low-level input voltage VIL 1.65 V VCC = 5.5V 4
High-level output current IOH -12 mA VCC = 3V 4
High-level output current IOH -24 mA VCC = 4.5V 4
Low-level output current IOL 12 mA VCC = 3V 4
Low-level output current IOL 24 mA VCC = 4.5V 4
Input transition rise or fall rate Δt/Δv 8 ns/V 4
Operating free-air temperature TA -40 125 °C 4
Supply voltage range VCC -0.5 7 V 4
Input voltage range VI -0.5 V Printed maximum is VCC + 0.5 V (not numeric) 4
Output voltage range VO -0.5 V Printed maximum is VCC + 0.5 V (not numeric) 4
Input clamp current IIK -20 20 mA VI < 0 or VI > VCC 4
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC 4
Continuous output current IO -50 50 mA VO = 0 to VCC 4
Continuous current through VCC or GND -200 200 mA 4
Storage temperature range Tstg -65 150 °C 4
High-level output voltage VOH 2.9 V TA = 25°C, VCC = 3V, IOH = −50μA 5
High-level output voltage VOH 4.4 V TA = 25°C, VCC = 4.5V, IOH = −50μA 5
High-level output voltage VOH 5.4 V TA = 25°C, VCC = 5.5V, IOH = −50μA 5
High-level output voltage VOH 2.4 V TA = −40°C to 125°C, VCC = 3V, IOH = −12mA 5
High-level output voltage VOH 3.7 V TA = −40°C to 125°C, VCC = 4.5V, IOH = −24mA 5
High-level output voltage VOH 4.7 V TA = −40°C to 125°C, VCC = 5.5V, IOH = −24mA 5
Low-level output voltage VOL 0.1 V TA = 25°C, VCC = 3V, IOL = 50μA 5
Low-level output voltage VOL 0.5 V TA = −40°C to 125°C, VCC = 3V, IOL = 12mA 5
Input leakage current II -1 1 μA A or B ports, VI = VCC or GND, VCC = 5.5V, TA = −40°C to 125°C 5
Supply current ICC 40 μA VI = VCC or GND, IO = 0, VCC = 5.5V, TA = −40°C to 125°C 5
Propagation delay time, low-to-high-level output (tPLH) tPLH 1.5 ns VCC = 3.3V ± 0.3V, TA = 25°C, A or B to Y 5
Propagation delay time, low-to-high-level output (tPLH) tPLH 9.5 ns VCC = 3.3V ± 0.3V, TA = 25°C, A or B to Y 5
Propagation delay time, low-to-high-level output (tPLH) tPLH 1 ns VCC = 3.3V ± 0.3V, TA = −40°C to 125°C, A or B to Y 5
Propagation delay time, low-to-high-level output (tPLH) tPLH 12.5 ns VCC = 3.3V ± 0.3V, TA = −40°C to 125°C, A or B to Y 5
Propagation delay time, high-to-low-level output (tPHL) tPHL 1.5 ns VCC = 3.3V ± 0.3V, TA = 25°C, A or B to Y 5
Propagation delay time, high-to-low-level output (tPHL) tPHL 8.5 ns VCC = 3.3V ± 0.3V, TA = 25°C, A or B to Y 5
Propagation delay time, high-to-low-level output (tPHL) tPHL 1 ns VCC = 3.3V ± 0.3V, TA = −40°C to 125°C, A or B to Y 5
Propagation delay time, high-to-low-level output (tPHL) tPHL 11.5 ns VCC = 3.3V ± 0.3V, TA = −40°C to 125°C, A or B to Y 5
Propagation delay time, low-to-high-level output (tPLH) tPLH 7.5 ns VCC = 5V ± 0.5V, TA = 25°C, A or B to Y 5
Propagation delay time, low-to-high-level output (tPLH) tPLH 9 ns VCC = 5V ± 0.5V, TA = −40°C to 125°C, A or B to Y 5
Junction-to-ambient thermal resistance (D, SOIC-14) RθJA 119.9 °C/W D (SOIC) 14-pin package; printed as single value without MIN/MAX 4

CAD (KiCad official)

  • Symbol: SN74AC08QDRG4Q1
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ac08qdrg4q1-etched.step / sn74ac08qdrg4q1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ac08qdrg4q1.step / sn74ac08qdrg4q1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 e938e5ee1d836c05, retrieved 2026-10-21, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF