component
SN74AC04MDREP
Public Made by Adomby adom
Texas Instruments Inverters, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 11h ago |
| viewers | 11h ago |
| package.json | 11h ago |
| page.json | 11h ago |
| README.md | 11h ago |
| sn74ac04mdrep-etched.glb | 11h ago |
| sn74ac04mdrep-etched.step | 11h ago |
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| sn74ac04mdrep-hero.overlay.json | 11h ago |
| sn74ac04mdrep.glb | 11h ago |
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| verification.json | 11h ago |
SN74AC04MDREP
Texas Instruments · Inverters · SOIC-14
SN74AC04MDREP from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Input of inverter 1 (Y = A); inputs accept voltages up to 6 V with VCC operation from 2 V to 6 V. |
| 2 | 1Y | output | Output of inverter 1; continuous output current is limited to ±50 mA per the absolute maximum ratings. |
| 3 | 2A | input | Input of inverter 2 (Y = A); inputs accept voltages up to 6 V with VCC operation from 2 V to 6 V. |
| 4 | 2Y | output | Output of inverter 2; continuous output current is limited to ±50 mA per the absolute maximum ratings. |
| 5 | 3A | input | Input of inverter 3 (Y = A); inputs accept voltages up to 6 V with VCC operation from 2 V to 6 V. |
| 6 | 3Y | output | Output of inverter 3; continuous output current is limited to ±50 mA per the absolute maximum ratings. |
| 7 | GND | power_in | Ground reference for all six inverters. |
| 8 | 4Y | output | Output of inverter 4; continuous output current is limited to ±50 mA per the absolute maximum ratings. |
| 9 | 4A | input | Input of inverter 4 (Y = A); inputs accept voltages up to 6 V with VCC operation from 2 V to 6 V. |
| 10 | 5Y | output | Output of inverter 5; continuous output current is limited to ±50 mA per the absolute maximum ratings. |
| 11 | 5A | input | Input of inverter 5 (Y = A); inputs accept voltages up to 6 V with VCC operation from 2 V to 6 V. |
| 12 | 6Y | output | Output of inverter 6; continuous output current is limited to ±50 mA per the absolute maximum ratings. |
| 13 | 6A | input | Input of inverter 6 (Y = A); inputs accept voltages up to 6 V with VCC operation from 2 V to 6 V. |
| 14 | VCC | power_in | Supply voltage, 2 V to 6 V per recommended operating conditions; absolute maximum is 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2 | 6 | V | 2 | ||
| High-level input voltage | VIH | 2.1 | V | VCC = 3 V | 2 | ||
| High-level input voltage | VIH | 3.15 | V | VCC = 4.5 V | 2 | ||
| High-level input voltage | VIH | 3.85 | V | VCC = 5.5 V | 2 | ||
| Low-level input voltage | VIL | 0.9 | V | VCC = 3 V | 2 | ||
| Low-level input voltage | VIL | 1.35 | V | VCC = 4.5 V | 2 | ||
| Low-level input voltage | VIL | 1.65 | V | VCC = 5.5 V | 2 | ||
| Input voltage | VI | 0 | V | upper limit printed as VCC | 2 | ||
| Output voltage | VO | 0 | V | upper limit printed as VCC | 2 | ||
| High-level output current | IOH | -12 | mA | VCC = 3 V | 2 | ||
| High-level output current | IOH | -24 | mA | VCC = 4.5 V | 2 | ||
| Low-level output current | IOL | 12 | mA | VCC = 3 V | 2 | ||
| Low-level output current | IOL | 24 | mA | VCC = 4.5 V | 2 | ||
| Input transition rise or fall rate | ∆t/∆v | 8 | ns/V | 2 | |||
| Operating free-air temperature | TA | -55 | 125 | °C | 2 | ||
| Supply voltage range | VCC | -0.5 | 7 | V | 2 | ||
| Input voltage range | VI | -0.5 | V | upper limit printed as VCC + 0.5 V | 2 | ||
| Output voltage range | VO | -0.5 | V | upper limit printed as VCC + 0.5 V | 2 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VCC | 2 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC | 2 | |
| Continuous output current | IO | -50 | 50 | mA | VO = 0 to VCC | 2 | |
| Continuous current through VCC or GND | -200 | 200 | mA | 2 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 2 | ||
| High-level output voltage | VOH | 2.9 | 2.99 | V | IOH = −50 µA, VCC = 3 V | 3 | |
| High-level output voltage | VOH | 4.4 | 4.49 | V | IOH = −50 µA, VCC = 4.5 V | 3 | |
| High-level output voltage | VOH | 5.4 | 5.49 | V | IOH = −50 µA, VCC = 5.5 V | 3 | |
| High-level output voltage | VOH | 2.4 | V | IOH = −12 mA, VCC = 3 V | 3 | ||
| High-level output voltage | VOH | 3.7 | V | IOH = −24 mA, VCC = 4.5 V | 3 | ||
| High-level output voltage | VOH | 4.7 | V | IOH = −24 mA, VCC = 5.5 V | 3 | ||
| Low-level output voltage | VOL | 0.002 | 0.1 | V | IOL = 50 µA, VCC = 3 V | 3 | |
| Low-level output voltage | VOL | 0.001 | 0.1 | V | IOL = 50 µA, VCC = 4.5 V | 3 | |
| Low-level output voltage | VOL | 0.36 | 0.5 | V | IOL = 12 mA, VCC = 3 V | 3 | |
| Input leakage current | II | -1 | 1 | µA | VI = VCC or GND, VCC = 5.5 V | 3 | |
| Supply current | ICC | 2 | 40 | µA | VI = VCC or GND, IO = 0, VCC = 5.5 V | 3 | |
| Propagation delay low-to-high (A to Y) | tPLH | 1 | 4.5 | 11 | ns | VCC = 3.3 V ± 0.3 V (see Figure 1); min/max over TA = −55°C to 125°C, typ at TA = 25°C | 3 |
| Propagation delay high-to-low (A to Y) | tPHL | 1 | 4.5 | 10 | ns | VCC = 3.3 V ± 0.3 V (see Figure 1); min/max over TA = −55°C to 125°C, typ at TA = 25°C | 3 |
| Propagation delay low-to-high (A to Y) | tPLH | 1 | 4 | 8.5 | ns | VCC = 5 V ± 0.5 V (see Figure 1); min/max over TA = −55°C to 125°C, typ at TA = 25°C | 3 |
| Propagation delay high-to-low (A to Y) | tPHL | 1 | 3.5 | 7.5 | ns | VCC = 5 V ± 0.5 V (see Figure 1); min/max over TA = −55°C to 125°C, typ at TA = 25°C | 3 |
| Package thermal impedance, junction to ambient | θJA | 86 | °C/W | see Note 2 (JESD 51-7) | 2 |
CAD (KiCad official)
- Symbol:
SN74AC04MDREP - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74ac04mdrep-etched.step/sn74ac04mdrep-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ac04mdrep.step/sn74ac04mdrep.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (9 pp, sha256
43b433afa55e4603, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).