component
SN74ABTH162260DL
Public Made by Adomby adom
Texas Instruments Latches, SSOP-56. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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SN74ABTH162260DL
Texas Instruments · Latches · SSOP-56
SN74ABTH162260DL from Texas Instruments, in a SSOP-56. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OEA | input | Output-enable input for the A port (B-to-A direction); A outputs are high-impedance when OEA is high. |
| 2 | LE1B | input | Latch-enable input for the 1B-to-A path; latch is transparent when high and holds data when low. |
| 3 | 2B3 | bidirectional | Bit 3 of 12-bit B port 2; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 4 | GND | power_in | Ground. |
| 5 | 2B2 | bidirectional | Bit 2 of 12-bit B port 2; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 6 | 2B1 | bidirectional | Bit 1 of 12-bit B port 2; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 7 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V recommended. |
| 8 | A1 | bidirectional | Bit 1 of 12-bit A port, with bus hold on the data input. |
| 9 | A2 | bidirectional | Bit 2 of 12-bit A port, with bus hold on the data input. |
| 10 | A3 | bidirectional | Bit 3 of 12-bit A port, with bus hold on the data input. |
| 11 | GND | power_in | Ground. |
| 12 | A4 | bidirectional | Bit 4 of 12-bit A port, with bus hold on the data input. |
| 13 | A5 | bidirectional | Bit 5 of 12-bit A port, with bus hold on the data input. |
| 14 | A6 | bidirectional | Bit 6 of 12-bit A port, with bus hold on the data input. |
| 15 | A7 | bidirectional | Bit 7 of 12-bit A port, with bus hold on the data input. |
| 16 | A8 | bidirectional | Bit 8 of 12-bit A port, with bus hold on the data input. |
| 17 | A9 | bidirectional | Bit 9 of 12-bit A port, with bus hold on the data input. |
| 18 | GND | power_in | Ground. |
| 19 | A10 | bidirectional | Bit 10 of 12-bit A port, with bus hold on the data input. |
| 20 | A11 | bidirectional | Bit 11 of 12-bit A port, with bus hold on the data input. |
| 21 | A12 | bidirectional | Bit 12 of 12-bit A port, with bus hold on the data input. |
| 22 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V recommended. |
| 23 | 1B1 | bidirectional | Bit 1 of 12-bit B port 1; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 24 | 1B2 | bidirectional | Bit 2 of 12-bit B port 1; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 25 | GND | power_in | Ground. |
| 26 | 1B3 | bidirectional | Bit 3 of 12-bit B port 1; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 27 | LE2B | input | Latch-enable input for the 2B-to-A path; latch is transparent when high and holds data when low. |
| 28 | SEL | input | Select input choosing whether 1B or 2B data is passed to the A port in the B-to-A direction. |
| 29 | OE1B | input | Output-enable input for B port 1 in the A-to-B direction; 1B outputs are high-impedance when OE1B is high. |
| 30 | LEA1B | input | Latch-enable input for the A-to-1B path; latch is transparent when high and holds data when low. |
| 31 | 1B4 | bidirectional | Bit 4 of 12-bit B port 1; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 32 | GND | power_in | Ground. |
| 33 | 1B5 | bidirectional | Bit 5 of 12-bit B port 1; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 34 | 1B6 | bidirectional | Bit 6 of 12-bit B port 1; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 35 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V recommended. |
| 36 | 1B7 | bidirectional | Bit 7 of 12-bit B port 1; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 37 | 1B8 | bidirectional | Bit 8 of 12-bit B port 1; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 38 | 1B9 | bidirectional | Bit 9 of 12-bit B port 1; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 39 | GND | power_in | Ground. |
| 40 | 1B10 | bidirectional | Bit 10 of 12-bit B port 1; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 41 | 1B11 | bidirectional | Bit 11 of 12-bit B port 1; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 42 | 1B12 | bidirectional | Bit 12 of 12-bit B port 1; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 43 | 2B12 | bidirectional | Bit 12 of 12-bit B port 2; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 44 | 2B11 | bidirectional | Bit 11 of 12-bit B port 2; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 45 | 2B10 | bidirectional | Bit 10 of 12-bit B port 2; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 46 | GND | power_in | Ground. |
| 47 | 2B9 | bidirectional | Bit 9 of 12-bit B port 2; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 48 | 2B8 | bidirectional | Bit 8 of 12-bit B port 2; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 49 | 2B7 | bidirectional | Bit 7 of 12-bit B port 2; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 50 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V recommended. |
| 51 | 2B6 | bidirectional | Bit 6 of 12-bit B port 2; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 52 | 2B5 | bidirectional | Bit 5 of 12-bit B port 2; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 53 | GND | power_in | Ground. |
| 54 | 2B4 | bidirectional | Bit 4 of 12-bit B port 2; output includes an equivalent 25-Ω series resistor and sinks up to 12 mA. |
| 55 | LEA2B | input | Latch-enable input for the A-to-2B path; latch is transparent when high and holds data when low. |
| 56 | OE2B | input | Output-enable input for B port 2 in the A-to-B direction; 2B outputs are high-impedance when OE2B is high. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-56 |
| Category | Logic ICs |
| Pins | 56 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 | 7 | V | 4 | ||
| Input voltage range | VI | -0.5 | 7 | V | see Note 1 | 4 | |
| Voltage range applied to any output in high or power-off state | VO | -0.5 | 5.5 | V | 4 | ||
| Current into any output in low state, A port | IO | 128 | mA | SN74ABTH162260 A port | 4 | ||
| Current into any output in low state, B port | IO | 30 | mA | B port | 4 | ||
| Input clamp current | IIK | -18 | mA | VI < 0 | 4 | ||
| Output clamp current | IOK | -50 | mA | VO < 0 | 4 | ||
| Package thermal impedance | θJA | 74 | °C/W | DL package, JESD51 | 4 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VCC | 4.5 | 5.5 | V | SN74ABTH162260 | 4 | |
| High-level input voltage | VIH | 2 | V | 4 | |||
| Low-level input voltage | VIL | 0.8 | V | 4 | |||
| Input voltage | VI | 0 | 5.5 | V | 0 to VCC | 4 | |
| High-level output current | IOH | -32 | mA | SN74ABTH162260 | 4 | ||
| Low-level output current A port | IOL | 64 | mA | A port | 4 | ||
| Low-level output current B port | IOL | 12 | mA | B port | 4 | ||
| Input transition rise or fall rate | Δt/Δv | 10 | ns/V | Outputs enabled | 4 | ||
| Power-up ramp rate | Δt/ΔVCC | 200 | µs/V | 4 | |||
| Operating free-air temperature | TA | -40 | 85 | °C | SN74ABTH162260 | 4 | |
| Input clamp voltage | VIK | -1.2 | V | VCC = 4.5 V, II = -18 mA | 5 | ||
| High-level output voltage | VOH | 2.5 | V | VCC = 4.5 V, IOH = -3 mA | 5 | ||
| High-level output voltage | VOH | 3 | V | VCC = 5 V, IOH = -3 mA | 5 | ||
| High-level output voltage | VOH | 2 | V | VCC = 4.5 V, IOH = -32 mA | 5 | ||
| Low-level output voltage A port | VOL | 0.55 | V | VCC = 4.5 V, IOL = 64 mA | 5 | ||
| Low-level output voltage B port | VOL | 0.8 | V | IOL = 12 mA | 5 | ||
| Input current control inputs | II | -1 | 1 | µA | VCC = 0 to 5.5 V, VI = VCC or GND | 5 | |
| Input current A or B ports | II | -20 | 20 | µA | VCC = 2.1 V to 5.5 V, VI = VCC or GND | 5 | |
| Power-up off-state output current | IOZPU | -50 | 50 | µA | VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V, OE = X | 5 | |
| Power-down off-state output current | IOZPD | -50 | 50 | µA | VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V, OE = X | 5 | |
| Off-state output current high | IOZH | 10 | µA | VCC = 2.1 V to 5.5 V, VO = 2.7 V, OE ≥ 2 V | 5 | ||
| Off-state output current low | IOZL | -10 | µA | VCC = 2.1 V to 5.5 V, VO = 0.5 V, OE ≥ 2 V | 5 | ||
| Output off current | Ioff | -100 | 100 | µA | VCC = 0, VI or VO ≤ 4.5 V | 5 | |
| Output high leakage current | ICEX | 50 | µA | Outputs high, VCC = 5.5 V, VO = 5.5 V | 5 | ||
| Output current | IO | -225 | -50 | mA | VCC = 5.5 V, VO = 2.5 V | 5 | |
| Supply current outputs high | ICC | 1.5 | mA | VCC = 5.5 V, IO = 0, VI = VCC or GND, outputs high | 5 | ||
| Supply current outputs low | ICC | 63 | mA | VCC = 5.5 V, IO = 0, VI = VCC or GND, outputs low | 5 | ||
| Supply current outputs disabled | ICC | 1 | mA | VCC = 5.5 V, IO = 0, VI = VCC or GND, outputs disabled | 5 | ||
| Increase in supply current per input | ΔICC | 1 | mA | VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND | 5 | ||
| Input capacitance | Ci | 3 | pF | VI = 2.5 V or 0.5 V | 5 | ||
| Output capacitance | Co | 11.5 | pF | VO = 2.5 V or 0.5 V | 5 | ||
| Pulse duration, LE high | tw | 3.3 | ns | VCC = 5 V, TA = 25°C | 6 | ||
| Setup time, data before LE low | tsu | 1.5 | ns | VCC = 5 V, TA = 25°C | 6 | ||
| Hold time, data after LE low | th | 1 | ns | VCC = 5 V, TA = 25°C | 6 |
CAD (KiCad official)
- Symbol:
SN74ABTH162260DL - Footprint:
Package_SO:SSOP-56_7.5x18.5mm_P0.635mm - 3D model: SSOP-56 (KiCad packages3D, STEP)
- 3D model files:
sn74abth162260dl-etched.step/sn74abth162260dl-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74abth162260dl.step/sn74abth162260dl.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (14 pp, sha256
5758179c81a84444, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).