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SN74ABT646APW

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Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74ABT646APW

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-24

SN74ABT646APW from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLKAB input Clock input for the A-to-B storage registers; A or B data is stored on each low-to-high transition of CLKAB.
2 SAB input Select control for the A-to-B path that chooses between real-time (transparent) and stored A data, per the function table on page 4.
3 DIR input Direction control that determines which bus receives data when OE is low (high selects A-to-B, low selects B-to-A).
4 A1 bidirectional Bus A data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
5 A2 bidirectional Bus A data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
6 A3 bidirectional Bus A data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
7 A4 bidirectional Bus A data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
8 A5 bidirectional Bus A data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
9 A6 bidirectional Bus A data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
10 A7 bidirectional Bus A data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
11 A8 bidirectional Bus A data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
12 GND power_in Ground reference pin.
13 B8 bidirectional Bus B data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
14 B7 bidirectional Bus B data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
15 B6 bidirectional Bus B data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
16 B5 bidirectional Bus B data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
17 B4 bidirectional Bus B data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
18 B3 bidirectional Bus B data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
19 B2 bidirectional Bus B data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
20 B1 bidirectional Bus B data input/output; the output function is disabled when OE is high, while the input function remains enabled for storage.
21 OE input Output enable; when high the outputs are isolated, and it should be tied to VCC through a pullup resistor so the outputs stay high-impedance during power up or power down.
22 SBA input Select control for the B-to-A path that chooses between real-time and stored B data, per the function table on page 4.
23 CLKBA input Clock input for the B-to-A storage registers; A or B data is stored on each low-to-high transition of CLKBA.
24 VCC power_in Supply voltage, recommended range 4.5 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-24
Category Logic
Pins 24

CAD (KiCad official)

  • Symbol: SN74ABT646APW
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: sn74abt646apw-etched.step / sn74abt646apw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74abt646apw.step / sn74abt646apw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (23 pp, sha256 49a704ac45dbc547, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF