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SN74ABT543ADWR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74ABT543ADWR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-24
SN74ABT543ADWR from Texas Instruments, in a SOIC-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LEBA | input | B-to-A latch enable; when LEBA is low with CEBA low the B-to-A latches are transparent, and a low-to-high transition puts them in storage mode. |
| 2 | OEBA | input | B-to-A output enable; the A outputs are active only when CEBA and OEBA are both low, and OE should be tied to VCC through a pullup resistor to keep the outputs high-impedance during power up or power down. |
| 3 | A1 | bidirectional | A-side 3-state data port, bit 1, which feeds the A-to-B latches and is driven by the B-to-A path when enabled. |
| 4 | A2 | bidirectional | A-side 3-state data port, bit 2, which feeds the A-to-B latches and is driven by the B-to-A path when enabled. |
| 5 | A3 | bidirectional | A-side 3-state data port, bit 3, which feeds the A-to-B latches and is driven by the B-to-A path when enabled. |
| 6 | A4 | bidirectional | A-side 3-state data port, bit 4, which feeds the A-to-B latches and is driven by the B-to-A path when enabled. |
| 7 | A5 | bidirectional | A-side 3-state data port, bit 5, which feeds the A-to-B latches and is driven by the B-to-A path when enabled. |
| 8 | A6 | bidirectional | A-side 3-state data port, bit 6, which feeds the A-to-B latches and is driven by the B-to-A path when enabled. |
| 9 | A7 | bidirectional | A-side 3-state data port, bit 7, which feeds the A-to-B latches and is driven by the B-to-A path when enabled. |
| 10 | A8 | bidirectional | A-side 3-state data port, bit 8, which feeds the A-to-B latches and is driven by the B-to-A path when enabled. |
| 11 | CEAB | input | A-to-B enable; must be low to enter data from A or to output data from B. |
| 12 | GND | power_in | Ground reference for the device. |
| 13 | OEAB | input | A-to-B output enable; with CEAB and OEAB both low, the 3-state B outputs are active, and OE should be tied to VCC through a pullup resistor to keep outputs high-impedance during power up or power down. |
| 14 | LEAB | input | A-to-B latch enable; when LEAB and CEAB are low the A-to-B latches are transparent, and a low-to-high transition of LEAB puts the A latches in storage mode. |
| 15 | B8 | bidirectional | B-side 3-state data port, bit 8, which drives the B outputs when CEAB and OEAB are both low. |
| 16 | B7 | bidirectional | B-side 3-state data port, bit 7, which drives the B outputs when CEAB and OEAB are both low. |
| 17 | B6 | bidirectional | B-side 3-state data port, bit 6, which drives the B outputs when CEAB and OEAB are both low. |
| 18 | B5 | bidirectional | B-side 3-state data port, bit 5, which drives the B outputs when CEAB and OEAB are both low. |
| 19 | B4 | bidirectional | B-side 3-state data port, bit 4, which drives the B outputs when CEAB and OEAB are both low. |
| 20 | B3 | bidirectional | B-side 3-state data port, bit 3, which drives the B outputs when CEAB and OEAB are both low. |
| 21 | B2 | bidirectional | B-side 3-state data port, bit 2, which drives the B outputs when CEAB and OEAB are both low. |
| 22 | B1 | bidirectional | B-side 3-state data port, bit 1, which drives the B outputs when CEAB and OEAB are both low. |
| 23 | CEBA | input | B-to-A enable; must be low to enter data from B or to output data from A. |
| 24 | VCC | power_in | Supply voltage, recommended operating range 4.5 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-24 |
| Category | Logic |
| Pins | 24 |
CAD (KiCad official)
- Symbol:
SN74ABT543ADWR - Footprint:
Package_SO:SOIC-24W_7.5x15.4mm_P1.27mm - 3D model: SOIC-24 (KiCad packages3D, STEP)
- 3D model files:
sn74abt543adwr-etched.step/sn74abt543adwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74abt543adwr.step/sn74abt543adwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (20 pp, sha256
cd4defbd194ff8d2, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).