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Contents

README

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SN74ABT541BPWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

SN74ABT541BPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Output enable 1 input (active low); drives all outputs to high-impedance state when high.
2 A1 input Input line 1; logic input with 2 V high threshold and 0.8 V low threshold at 4.5-5.5 V VCC.
3 A2 input Input line 2; logic input with 2 V high threshold and 0.8 V low threshold at 4.5-5.5 V VCC.
4 A3 input Input line 3; logic input with 2 V high threshold and 0.8 V low threshold at 4.5-5.5 V VCC.
5 A4 input Input line 4; logic input with 2 V high threshold and 0.8 V low threshold at 4.5-5.5 V VCC.
6 A5 input Input line 5; logic input with 2 V high threshold and 0.8 V low threshold at 4.5-5.5 V VCC.
7 A6 input Input line 6; logic input with 2 V high threshold and 0.8 V low threshold at 4.5-5.5 V VCC.
8 A7 input Input line 7; logic input with 2 V high threshold and 0.8 V low threshold at 4.5-5.5 V VCC.
9 A8 input Input line 8; logic input with 2 V high threshold and 0.8 V low threshold at 4.5-5.5 V VCC.
10 GND power_in Ground; 0 V reference.
11 Y8 tri_state Output line 8; 3-state output with 24 mA source and 64 mA sink capability; high-impedance when OE input is high.
12 Y7 tri_state Output line 7; 3-state output with 24 mA source and 64 mA sink capability; high-impedance when OE input is high.
13 Y6 tri_state Output line 6; 3-state output with 24 mA source and 64 mA sink capability; high-impedance when OE input is high.
14 Y5 tri_state Output line 5; 3-state output with 24 mA source and 64 mA sink capability; high-impedance when OE input is high.
15 Y4 tri_state Output line 4; 3-state output with 24 mA source and 64 mA sink capability; high-impedance when OE input is high.
16 Y3 tri_state Output line 3; 3-state output with 24 mA source and 64 mA sink capability; high-impedance when OE input is high.
17 Y2 tri_state Output line 2; 3-state output with 24 mA source and 64 mA sink capability; high-impedance when OE input is high.
18 Y1 tri_state Output line 1; 3-state output with 24 mA source and 64 mA sink capability; high-impedance when OE input is high.
19 OE2 input Output enable 2 input (active low); drives all outputs to high-impedance state when high.
20 VCC power_in Positive supply voltage; 4.5 to 5.5 V recommended operating range.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74ABT541BPWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74abt541bpwr-etched.step / sn74abt541bpwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74abt541bpwr.step / sn74abt541bpwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 15e82956ebf8b096, retrieved 2026-09-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF